Scheduling for embedded real-time systems

IEEE Design and Test of Computers

Volumn 15, Issue 1, 1998, Pages 71-82

  Balarin, Felice ^a,c,d,e   Lavagno, Luciano ^a,b,d,e   Murthy, Praveen ^c,d,e,f   Sangiovanni Vincentelli, Alberto ^d,e,g,h,i  

^a Cadence Berkeley Labs   (United States)

^b POLITECNICO DI TORINO   (Italy)

^c CADENCE DESIGN SYSTEMS   (United States)

^d UNIVERSITY OF CALIFORNIA   (United States)

^e IEEE   (United States)

^f GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

^g POLITECNICO DI MILANO   (Italy)

^h Cadence and Synopsys   (United States)

ⁱ Cadence Berkely Cadence Europ Labs   (United States)

Author keywords

Dr.

Indexed keywords

ALGORITHMS; BUFFER STORAGE; COMPUTER SIMULATION; DATA STRUCTURES; DIGITAL SIGNAL PROCESSING; GRAPH THEORY; LINEAR PROGRAMMING; MATHEMATICAL MODELS; PROGRAM PROCESSORS;

CONTROL ORIENTED SYSTEMS; DATAFLOW ORIENTED SYSTEMS; SOFTWARE SCHEDULING;

REAL TIME SYSTEMS;

EID: 0031708530     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/54.655185     Document Type: Article

References (13)

1. C. Liu and J.W Layland, "Scheduling Algorithms for Multiprogramming in a Hard Real-Time Environment," ACM J., Jan. 1973, Vol.20, No. 1, pp. 44-61.
2. N.C. Audsley, K.W. Tindell, and A. Burns, The End of the Line for Static Cyclic Scheduling?" Proc. Fifth Euromicro Workshop on Real-Time Systems, IEEE Computer Society Press, Los Alamitos, Calif., 1993, pp. 3641.
3. N.C. Audsley et al., "Applying New Scheduling Theory to Static Priority Preemptive Scheduling," Software Engineering J., Vol. 8, No. 5, Sept. 1993, pp. 284-292.
4. F. Balarin and A. Sangiovanni-Vincentelli, "Schedule Validation for Embedded Reactive Real-Time Systems," Proc. 34th ACM/IEEE Design Automation Conf., IEEE Computer Society Press, Los Alamitos, Calif., June 1997, pp. 568-571.
5. N. Halbwachs, Synchronous Programming of Reactive Systems, Kluwer Academic Publishers, Dordrecht, Boston, 1993.
6. G. Berry, P. Couronne", and G. Gonthier, "The Synchronous Approach to Reactive and Real-Time Systems," Proc. IEEE, Vol. 79, No. 9, Sept. 1991, pp. 1270-1282.
7. R. Reiter, "Scheduling Parallel Computations," ACM J., Vol. 15, No. 4, Oct. 1968.
8. P.K. Murthy and E.A. Lee, "On the Optimal Blocking Factor for Blocked, Non-Overlapped Schedules," Proc. 28th Asilomar Conf. Signals, Systems, and Computers, IEEE CS Press, Vol. 2, Nov. 1994, pp. 1052-1057.
9. G. Liao et al., "A Comparative Study of Multiprocessor List Scheduling Heuristics," Proc. 27th Hawaii Int'l Conf. System Sciences, Vol. 1, Jan. 1994, pp. 68-77.
10. S.M. Heemstra de Groot, S.H. Gerez, and O.E. Herrman, "Range-Chart-Guided Iterative Data-Flow Graph Scheduling," IEEE Trans. Circuits and Systems-1 Fundamental Theory and Applications, May 1992, Vol. 39, No. 5, pp. 351-64.
11. J.T. Buck et al., "Ptolemy: A Framework for Simulating and Prototyping Heterogeneous Systems," Int'l J. Computer Simulation, Vol. 4, Apr. 1994.
12. S. Ritz, M. Pankert, and H. Meyr, Optimum Vectorization of Scalable Synchronous Dataflow Graphs," Proc. Int'l Conf. Application-Specific Array Processors, IEEE CS Press, 1993.
13. S.S. Bhattacharyya, P.K. Murthy, and E.A. Lee, Software Synthesis from Dataflow Graphs, Kluwer Academic Publishers, 1996.