SuperENC: MPEG-2 video encoder chip

IEEE Micro

Volumn 19, Issue 4, 1999, Pages 56-65

  Ikeda, Mitsuo ^a   Kondo, Toshio ^a   Nitta, Koyo ^a   Suguri, Kazuhito ^a   Yoshitome, Takeshi ^a   Minami, Toshihiro ^a   Iwasaki, Hiroe ^a   Ochiai, Katsuyuki ^a   Naganuma, Jiro ^a   Endo, Makoto ^a   Tashiro, Yutaka ^a   Watanabe, Hiroshi ^a   Kobayashi, Naoki ^a   Okubo, Tsuneo ^a   Ogura, Takeshi ^a   Kasai, Ryota ^a  

^a NONE

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER ARCHITECTURE; COMPUTER SOFTWARE; HIGH DEFINITION TELEVISION; IMAGE CODING; IMAGE COMPRESSION; IMAGE QUALITY; INTEGRATED CIRCUIT LAYOUT; INTELLECTUAL PROPERTY; LSI CIRCUITS; STANDARDS;

MOTION PICTURES EXPERT GROUP; MPEG-2 VIDEO ENCODER CHIP; SUPERENC;

MICROPROCESSOR CHIPS;

EID: 0032592087     PISSN: 02721732     EISSN: None     Source Type: Journal    
DOI: 10.1109/40.782568     Document Type: Article

References (8)

1. ISO/IEC 13818-2 Int'l Std. (Video), Information Technology - Generic Coding of Moving Pictures and Associated Audio, Int'l Organization for Standardization/Int'l Electronics Commission, Geneva, 1994.
2. T. Kondo et al., "Two-Chip MPEG-2 Video Encoder," IEEE Micro, Vol. 16, No. 2, Apr. 1996, pp. 51-58.
3. Y. Tashiro et al., "MPEG2 Video and Audio CODEC Board Set for a Personal Computer," Proc. IEEE Global Telecommunications Conf., Vol. 1, IEEE Press, Piscataway, N.J., 1995, pp. 483-487.
4. N. Terada et al., "An MPEG2-Based Digital CATV and VOD System Using ATM-PON Architecture," Proc. IEEE Int'l Conf. Multimedia Computing and Systems, IEEE Computer Soc. Press, Los Alamitos, Calif., 1996, pp. 522-531.
5. M. Ikeda et al., "A Hardware/Software Concurrent Design for a Real-Time SP@ML MPEG2 Video-Encoder Chip Set," Proc. European Design and Test Conf., IEEE Computer Soc. Press, 1996, pp. 320-326.
6. K. Ochiai et al., "High-Speed Software-Based Platform for Embedded Software of a Single-Chip MPEG-2 Video Encoder LSI with HDTV Scalability," Proc. Design, Automation, and Test in Europe Conf., IEEE Computer Soc. Press, 1999, pp. 303-308.
7. K. Nitta et al., "Motion Estimation/Motion Compensation Hardware Architecture for a Scene-Adaptive Algorithm on a Single-Chip MPEG2 MP@ML Video Encoder," Proc. IS&T/SPIE Conf. Visual Communications and Image Processing, Vol. 3,653, Soc. of Photo-Optical Instrumentation Engineers, (SPIE) Bellingham, Wash., 1999, pp. 874-882.
8. K. Suguri et al., "A Scalable Architecture of Real-Time MP@HL MPEG-2 Video Encoder for Multi-Resolution Video," Proc. IS&T/SPIE Conf. Visual Communications and Image Processing, Vol. 3,653, SPIE, 1999, pp. 895-904.