Hardware/software co-synthesis with memory hierarchies

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 18, Issue 10, 1999, Pages 1405-1417

  Li, Yanbing ^a,b   Wolf, Wayne H ^a,b  

^a SYNOPSYS INC   (United States)

^b Princeton University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER STORAGE; COMPUTER ARCHITECTURE; COMPUTER SYSTEMS PROGRAMMING; DISTRIBUTED COMPUTER SYSTEMS; REAL TIME SYSTEMS; RESPONSE TIME (COMPUTER SYSTEMS);

HARDWARE/SOFTWARE CO-SYNTHESIS; MEMORY HIERARCHY;

COMPUTER AIDED DESIGN;

EID: 0033343643     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.790618     Document Type: Article

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