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Volumn , Issue , 1993, Pages 483-458
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Sequential circuit delay optimization using global path Delays
a a a a
a
NEC CORPORATION
(Japan)
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Author keywords
[No Author keywords available]
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Indexed keywords
COMBINATORIAL CIRCUITS;
DELAY CIRCUITS;
DIGITAL CIRCUITS;
MONTE CARLO METHODS;
OPTIMIZATION;
DELAY CONSTRAINTS;
GLOBAL PATH DELAYS;
SEQUENTIAL CIRCUITS;
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EID: 0027149631
PISSN: 01467123
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (4)
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References (8)
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