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Volumn 20, Issue 2, 2002, Pages 725-727
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Relaxed SiGe-on-insulator fabricated via wafer bonding and etch back
a,b a,b a,b a,b a,b
b
USA
(United States)
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Author keywords
[No Author keywords available]
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Indexed keywords
ANNEALING;
ATOMIC FORCE MICROSCOPY;
CHEMICAL MECHANICAL POLISHING;
CHEMICAL VAPOR DEPOSITION;
FABRICATION;
INTERDIFFUSION (SOLIDS);
MOS DEVICES;
SEMICONDUCTING SILICON COMPOUNDS;
SUBSTRATES;
TRANSMISSION ELECTRON MICROSCOPY;
ULTRAHIGH VACUUM;
ETCH PIT DENSITY (EPD);
SILICON ON INSULATOR TECHNOLOGY;
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EID: 0036504842
PISSN: 10711023
EISSN: None
Source Type: Journal
DOI: 10.1116/1.1463727 Document Type: Article |
Times cited : (32)
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References (24)
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