High-quality ultrathin (1.6 nm) nitride/oxide stack gate dielectrics prepared by combining remote plasma nitridation and LPCVD technologies

IEEE Electron Device Letters

Volumn 22, Issue 6, 2001, Pages 260-262

  Chen, C H ^a   Fang, Y K ^a   Yang, C W ^a   Ting, S F ^a   Tsair, Y S ^a   Wang, M F ^b   Lin, Y M ^b   Yu, M C ^b   Chen, S C ^b   Yu, C H ^b   Liang, M S ^b  

^a NATIONAL CHENG KUNG UNIVERSITY   (Taiwan)

^b TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY   (Taiwan)

Author keywords

Gate dielectric; Low pressure chemical vapor deposition (LPCVD); Nitride oxide (N O); Remote plasma nitridation (RPN); Ultrathin

Indexed keywords

CHEMICAL VAPOR DEPOSITION; GATES (TRANSISTOR); LEAKAGE CURRENTS; MOSFET DEVICES; NITRIDES; OXIDES;

GATE DIELECTRICS; LOW PRESSURE CHEMICAL VAPOR DEPOSITION (LPCVD);

DIELECTRIC MATERIALS;

EID: 0035362355     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/55.924835     Document Type: Article

References (13)

1. Impact of boron penetration on gate oxide reliability and device lifetime in p+-poly PMOSFETs
2. Quantum-mechanical modeling of electron tunneling current from inversion layer of ultrathin oxide nMOSFETs
3. 2 interfaces prepared by remote plasma enhanced CVD and post-deposition rapid thermal annealing
4. Ultrathin oxide-nitride gate dielectric MOSFETs
5. Effect of polysilicon gate type on the flatband voltage shift for ultrathin oxide-nitride gate stacks
6. 4 stack gate dielectrics on the process controllability and reliability in direct tunneling regime
7. Modeling and optimization of ozynitride gate dielectrics formation by remote plasma nitridation of silicon dioxide
8. Ultrathin nitrogen-profile engineered gate dielectric films
9. Quantum effect in oxide thickness determination from capacitance measurement
10. 4 gate dielectric for deep-sub-micron CMOS devices
11. 1.6 nm oxide equivalent gate dielectrics using nitride/oxide (N/O) composites prepared by RPECVD/oxidation process
12. Electrical properties of high-quality ultrathin nitride/oxide stack dielectrics
13. A comparative study of gate direct tunneling and drain leakage currents in N-MOSFETs with sub-2-nm gate oxides