Equivalent Elmore delay for RLC trees

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 19, Issue 1, 2000, Pages 83-97

  Ismail, Yehea I ^a   Friedman, Eby G ^a   Neves, José L ^b  

^a University of Rochester   (United States)

^b IBM MICROELECTRONICS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN; COMPUTER SIMULATION; EQUIVALENT CIRCUITS; INTEGRATED CIRCUIT LAYOUT; OPTIMIZATION; TREES (MATHEMATICS); VLSI CIRCUITS;

ELMORE DELAY;

DELAY CIRCUITS;

EID: 0033881978     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.822622     Document Type: Article

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