A switched virtual-GND level technique for fast and low power SRAM's

IEICE Transactions on Electronics

Volumn E80-C, Issue 12, 1997, Pages 1598-1607

  Shibatai, Nobutaro ^a  

^a NTT CORPORATION   (Japan)

Author keywords

Column address; Macrocell; Sram, low power; Synchronous; Virtual gnd

Indexed keywords

CELLULAR ARRAYS; CMOS INTEGRATED CIRCUITS; ELECTRIC LOSSES; INTEGRATED CIRCUIT MANUFACTURE;

STATIC RANDOM ACCESS MEMORY (SRAM);

RANDOM ACCESS STORAGE;

EID: 0031366182     PISSN: 09168524     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

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