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A high performance 4K static RAM fabricated with an advanced MOS technology
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H-MOS scales traditional devices to higher performance level
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85069353989
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High speed 1K bit static RAM using DSA MOST’s
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Tokyo, Japan Aug.
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K. Kobayashi, M. Saitoh, Y. Murao, and K. Takahashi, “High speed 1K bit static RAM using DSA MOST’s, Dig. Tech. Papers, 10th Conf. on Solid State Devices (Tokyo, Japan), pp. 21–22, Aug. 1978.
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Kobayashi, K.1
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C2MOS 4K static RAM
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K. Ochii, Y. Suzuki, M. Ueno, K. Sato, and K. Asahi, “C 2 MOS 4K static RAM, ISSCC Dig. Tech. Papers, pp. 18–19, Feb. 1977.
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Ochii, K.1
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A high speed bulk CMOS C2L microprocessor
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Dingwall, A.1
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A high-speed, low-power Hi-CMOS 4K static RAM
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Feb.
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T. Mashuhara, O. Minato, T. Sasaki, M. Kubo, and T. Yasui, “A high-speed, low-power Hi-CMOS 4K static RAM, ISSCC Dig. Tech. Papers, 110–111, Feb. 1978.
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Mashuhara, T.1
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7
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High packing density, high speed CMOS (Hi-CMOS) device technology
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Aug. Tokyo, Japan
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Y. Sakai, T. Masuhara, O. Minato, and N. Hashimoto, “High packing density, high speed CMOS (Hi-CMOS) device technology, Dig. Tech. Papers, 10th Conf. on Solid State Devices (Tokyo, Japan), pp. 19–20, Aug. 1978.
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Sakai, Y.1
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Minato, O.3
Hashimoto, N.4
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A monolithic junction FET NPN operational amplifier
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Feb.
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G. Wilson, “A monolithic junction FET NPN operational amplifier, ISSCC Dig. Tech. Papers, pp. 20–21, Feb. 1968.
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Wilson, G.1
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9
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Complementary MOS- bipolar transistor structure
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Nov.
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H. Lin, J. Ho, R. Iyer, and K. Kwong, “Complementary MOS- bipolar transistor structure,” IEEE Trans. Electron Devices, vol. ED-16, pp. 945–951, Nov. 1969.
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