Erase/write cycle tests of n-MOSFET's with Si-implanted gate-SiO2

IEEE Transactions on Electron Devices

Volumn 43, Issue 9, 1996, Pages 1374-1381

  Ohzone, Takashi ^a   Matsuda, Toshihiro ^a   Hori, Takashi ^b  

^a TOYAMA PREFECTURAL UNIVERSITY   (Japan)

^b Semiconductor Research Center   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CURRENT VOLTAGE CHARACTERISTICS; GATES (TRANSISTOR); HYSTERESIS; ION IMPLANTATION; RANDOM ACCESS STORAGE; SEMICONDUCTING SILICON COMPOUNDS; SEMICONDUCTOR DEVICE TESTING;

ERASE WRITE (E/W) CYCLES; NON VOLATILE RANDOM ACCESS MEMORY (NVRAM); SILICON IMPLANTATION; SINE WAVE VOLTAGE; THRESHOLD VOLTAGE WINDOW;

MOSFET DEVICES;

EID: 0030242589     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.535321     Document Type: Article

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