A simple method to qualify the LDD structure against the early mode of hot-carrier degradation

IEEE Transactions on Electron Devices

Volumn 43, Issue 1, 1996, Pages 110-115

  Raychaudhuri, Arya ^a,b   Jamal Deen, M ^a,b   King, M I H ^a,b   Kwan, Wing Suen ^a,b  

^a SIMON FRASER UNIVERSITY   (Canada)

^b Glenayre R and D Inc   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; CURRENT VOLTAGE CHARACTERISTICS; DEGRADATION; ELECTRIC CURRENT MEASUREMENT; ELECTRONS; HOT CARRIERS; IONIZATION; VOLTAGE MEASUREMENT;

DRAIN PARASITIC RESISTANCE; FLOATING GATE MEASUREMENT; HOT CARRIER DEGRADATION; THRESHOLD VOLTAGE SHIFTS;

MOSFET DEVICES;

EID: 0029774192     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.477600     Document Type: Article

References (21)

1. F.-C, Hsu and H. R. Grinolds, "Structure-enhanced MOSFET degradation due to hot-electron injection," IEEE Electron Device Lett., vol. EDL-5, pp. 71-74, 1984.
2. F. Matsuoka, K. Kasai, H. Oyamatsu, M. Kinugawa and K. Maeguchi, "Drain stiucturc optimization for highly reliable deep submicrometer n- channel MOSFET," IEEE Trans. Electron Devices, vol. 41, pp. 420-426, 1994.
3. D.J. Mountain and D. M. Burnell, "An evaluation of conventional and LDD devices for submicron geometries," Solid State Electron., vol. 33, pp. 565-570, 1990.
4. F.H. Gaensslen and J. M. Aitken, "Sensitive technique for measuring small MOS gate currents," IEEE Electron Device. Lett, vol. EDL-5, pp. . 231-233, 1980.
5. N.S. Saks, P. L. Heremans, L. Van Den Hove, R. F. de Keersmaecker and G. J. Declerck, "Observation of hot-hole injection in MOS transistor using a modified floating-gate technique," IEEE Trans. Electron Devices, vol. ED-33, pp. 1529-1533, 1986.
6. J.-C. Marchetaux, M. Bourcerie, A. Boudou and D. Vuillaume, "Application of the floating-gate technique to the study of the n-MOSFET gate current evolution due to hot-carrier aging," IEEE Electron Device Lett., vol. 11, pp. 406-408, 1990.
7. D. Vuillaume, J.-C. Marchetaux, P.-E. Lippens, A. Bravaix and A. Roudou, "A coupled study by floating-gate and charge-pumping techniques of hot-carrier-induced defects in submicrometer LDD n- MOSFET's." IEEE Trans. Electron Devices, vol. ED-40, pp. 773-781, 1993.
8. B. Fishbein, D. Krakauer and B. Doyle, "Measurement of very low tunneling current density in SiU2 using the floating-gate technique," IEEE Electron Device Lett, vol. 12, pp. 713-715, 1991.
9. S. Cserveny, "Relationship between measured and intrinsic conductances of MOSFET's," IEEE Trans. Electron Devices, vol. 37, pp. 2413-2414, 1990.
10. S.Y. Chou and D. A. Antoniadis, "Relationship between measured and intrinsic transconductances of FET's," IEEE Trans. Electron Devices, vol. ED-34, pp. 448-450, 1987.
11. A. Raychaudhuri, J. Kolk, J. Deen and M. I. H. King, "A simple method to extract the asymmetry in parasitic source and drain resistances from measurements on a MOS transistor," accepted for publication, IEEE Trans. Electron Devices, 1995.
12. X.M. Li and M. J. Deen, "Determination of interface state density in MOSFET's using the spatial profiling charge pumping technique," Solid-Stale Electron., vol. 35, pp. 1059-1063, 1992.
13. M.G. Ancona, N. S. Saks and D. McCarthy, "Lateral distribution of hot-carrier-induced interface traps in MOSFET's," IEEE Trans. Electron Devices, vol. ED-35, pp. 2221-2228, 1987.
14. T.Y. Chan, A. T. Wu, P. K. Ko, C. Hu and R. R. Razouk, "Asymmetrical characteristics in LDD and minimum-overlap MOSFET's," IEEE Electron Device Lett, vol. EDL-7, pp. 16-19, 1986.
15. D. Vuillaume and B.S. Doyle, "Properties of hot carrier induced traps in MOSFET's characterized by the floating-gate technique," Solid-State Electron., vol. 35, pp. 1099-1107, 1992.
16. C. Hu, S. C. Tarn, F.-C. Hsu, P. K. Ko, T. Y. Chan and K. W. Terrill, "Hol-elec-tronijiduced MOSFET dégradation-model, monitor, and improvement," IEEE Trans. Electron Devices, vol. ED-32, pp. 375-385, 1985.
17. TMA MEDICI Two-Dimensional Device Simulation Program, version 2.0, Technology Modeling Associates. Inc., Palo Alto. CA, 1994.
18. M.J. Deen and A. Raychaudhuri, "Charge pumping, low frequency noise, and floating gate characterization techniques of SiOa gate insulators in MOSFHT's," Proc. Third Symp. Silicon Nitride and Silicon Dioxide Thin Insulating Films, V. J. Kapoor and W. D. Brown, Eds., pp. 375-384, 1994.
19. S. Cristoloveanu, H. Haddara and N. Revil, "Defect localization induced by hot carrier injection in short-channel MOSFETs: concept, modeling, and characterization," Microelectron. Reliability, vol. 33, pp. 1365-1385, 1993.
20. A Raychaudhuri, W. S. Kwan, M. J. Deen, and M. I. H. King, "Propagation of defects in hot-carrier degradation of LDD MOSFET's-from the early made to the late made," in Proc. 1995 Int. Semiconductor Device Research Symp. (ISDRS '95), Charlottsville, VA, Dec. 6-8, 1995.
21. A. Raychaudhuri, M. J. Deen, M. 1. H. King, and J. Kolk, "A simple method to extract the parasitic resistances from a single MOSFET using measurements of small-signal conductances," in Proc. 25th European Solid Slate Device Research Conf. (ESSDERC '95), The Hague, Netherlands, Sept. 25-27, 1995, pp. 749-752.