Asymmetrical Characteristics in LDD and Minimum-Overlap MOSFET's

IEEE Electron Device Letters

Volumn 7, Issue 1, 1986, Pages 16-19

  Chan, T Y ^a   Wu, A T ^a   Ko, P K ^a   Hu, Chenming ^a   Razouk, Reda R ^b  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b Fairchild   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

SEMICONDUCTOR MATERIALS - ION IMPLANTATION; SUBSTRATES;

ASYMMETRICAL DRAIN, SUBSTRATE AND CURRENT PHENOMENA; DRAIN-SOURCE REVERSAL; LIGHTLY DOPED DRAIN (LDD) MOSFET; MINIMUM REVERSAL MOSFET;

SEMICONDUCTOR DEVICES, MOSFET;

EID: 0022563701     PISSN: 07413106     EISSN: 15580563     Source Type: Journal    
DOI: 10.1109/EDL.1986.26277     Document Type: Article

References (6)

1. S. Ogura, P. J. Tsang, W. W. Walker, D. L. Critchlow, and J. F. Shepard, “Design and characteristics of the lightly doped drain-source(LDD) insulated gate field-effect transistor,” IEEE Trans: Electron Devices, vol. ED-27, pp. 1359–1367, Aug. 1980.
2. F.-C. Hsu and H. R. Grino ids, “Structure-enhanced MOSFET degradation due to hot-electron injection,” IEEE Electron Device Lett., vol. EDL-5, pp. 71L74, Mar. 1984.
3. P. K. Kp, S. Tam, C. Hu, and S: S. Wang, “Enhancement of hot-electron electron currents in graded-gate-oxide (GG0)-MOSFET's,” in 1984 IEDM Tech. Dig., Pp. 88–91.
4. J. Hui, F.-C. Hsu, and J. Moll, “A new substrate and gate current phenomenon in short-channel LDD and minimum overlap devices,” IEEE Electron Device Lett., vol. EDL-6, 135–138, Mar. 1985.
5. H. Katto, K. Okayama, S. Meguro, R. Nagai, and S. Ikeda, “Hot carrier degradation modes and optimization of LDD MOSFET’s,” in 1984 IEDM Teak Dig., pp. 774–777.
6. S. Tam, P. K. Ko, C. Hu, and R. S. Muller, “Correlation between substrate and gate currents in MOSFET’s,” IEEE Trans. Electron Devices, vol. ED-29, pp. 1740–1744, Nov. 1982.