A review of the pseudo-MOS transistor in SOI wafers: Operation, parameter extraction, and applications

IEEE Transactions on Electron Devices

Volumn 47, Issue 5, 2000, Pages 1018-1027

  Cristoloveanu, Sorin ^a   Munteanu, Daniela ^a   Liu, Michael S T ^a,b  

^a CNRS   (France)

^b HONEYWELL TECHNOLOGY CENTER   (United States)

Author keywords

Characterization; Pseudo MOSFET; SOI; SOI technology; Unibond

Indexed keywords

EID: 0012022887     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.841236     Document Type: Article

References (26)

1. J. Bardeen and W. H. Brattain, "The transistor, a semi-conductor triode," Phys. Rev., pp. 230-231, July 15, 1947.
2. W. Shockley, "The theory of p-n junctions in semiconductors and p-n junction transistors," Bell Syst. Tech. J., pp. 435-4189, July 15, 1949.
3. S. Cristoloveanu and S. Williams, "Point-contact pseudo-MOSFET for in-situ characterization of as-grown silicon-on-insulator wafers," IEEE Electron Device Lett., vol. 13, pp. 102-104, February 1992.
4. S. T. Liu, P. S. Fechner, and R. L. Roisen, "Fast turn characterization of SIMOX wafers," in Proc. IEEE SOS/SOI Technology Conf.. 1990, pp. 61-62.
5. S. Cristoloveanu and S. S. Li, Electrical Characterization of SOI Materials and Devices. Boston, MA: Kluwer, 1995.
6. S. Williams, S. Cristoloveanu, and G. Campisi, "Point-contact pseudometal/oxide/semiconductor transistor in as-grown silicon on insulator wafers," Mater. Sci. Eng., vol. B12, pp. 191-194, 1992.
7. T. Ouisse étal, "A detailed investigation of the pseudo-MOS transistor for in situ characterization of SOI wafers," in Proc. 1992 IEEE Int. SOI Conf., 1992, pp. 30-31.
8. G. Ghibaudo, "New method for the extraction of MOSFET parameters," Electron. Lett., vol. 24, pp. 543-544, 1988.
9. D. K. Schröder, Semiconductor Material and Device Characterization. New York: Wiley, 1990.
10. S. Cristoloveanu and T. Elewa, "Model for carrier lifetime extraction from pseudo-MOSFET transients," Electron. Lett., vol. 32, pp. 2021-2023, 1996.
11. A. M. lonescu et al., "A new lifetime characterization technique using drain current transients in SOI materials," Solid-State Electron., vol. 39, no. 12, pp. 1753-1755, Dec. 1996.
12. D. Munteanu, S. Cristoloveanu, and E. Guichard, "Numerical simulation of the pseudo-MOSFET characterization technique," Solid-State Electron., vol. 43, pp. 547-554, 1999.
13. Atlas User's Manual, Device Simulation Software: SILVACO International, 1996.
14. H. J. Hovel, "The Hg-FET: A new characterization tool for SOI silicon film properties," in Proc. 1997 IEEE Int. SOI Conf., 1997, pp. 180-181.
15. D. Munteanu, S. Cristoloveanu, and H. Hovel, "Circular pseudo-metal oxide semiconductor field effect transistor in silicon-on-insulator: Analytical model, simulation, and measurements," Electrochem. Solid-State Lett., vol. 2, pp. 242-243, May 1999.
16. A. M. lonescu, S. Cristoloveanu, S. R. Wilson, A. Rusu, A. Chovet, and H. Seghir, "Improved characterization of fully-depleted SOI wafers by pseudo-MOS transistor," Nucl. Instrum. Methods Phys., vol. B-l 12, pp. 228-232, 1996.
17. M. Bruel, "Silicon On insulator material technology," Electron. Lett., vol. 31, pp. 1201-1203, 1995.
18. D. Munteanu etal, "Detailed characterization of UNIBOND material," Microelectron. Eng., vol. 36, pp. 395-398, 1997.
19. D. Munteanu etal., "Influence of the annealing duration on the interface roughness and electrical properties of Low-Dose SIMOX wafers," Siticon-on-lnsulatorTechnol. Devices VIII, vol. 97-23, pp. 131-136, 1997.
20. S. Cristoloveanu et al, "Influence of nitrogen or argon anneals on the properties of SIMOX wafers and devices," J. Electrochem. Soc., vol. 144, pp. 1468-1473, April 1997.
21. D. Munteanu, C. Guilhalmenc, S. Cristoloveanu, H. Moriceau, and B. Aspar, "Annealing and sacrificial oxidation-induced modifications of the properties of the thin SOI films," in Proc. 28th IEEE Semiconductor Interface Specialists Conf., Charleston, USA, December 7-11, 1997.
22. J. Yue, H. K. Liou, and S. T. Liu, "Screening SIMOX wafers' background doping for SOI CMOS SRAM production," Silicon-on-Insulator Technol. Devices VIII, vol. 97-23, pp. 137-142, 1997.
23. S. T. Liu, J. Yue, and J. Schrankler, "Screening SOI substrates for radiation resistant space electronics applications," in Proc. 1997 IEEE Int. SOI Conf., 1997, pp. 7-8.
24. S. T. Liu et al, "Reduction of radiation induced back channel threshold voltage shifts in partially depleted SIMOX CMOS devices by using ADVANTOX substrates," IEEE Trans. Nucl. Sei, vol. 44, pp. 2101-2105, 1997.
25. R. K. Lawrence, B. J. Mrstik, H. L. Hughes, and P. J. McMarr, "Radiation induced charge in SIMOX buried oxides: Lack of thickness dependence at low applied fields," IEEE Trans. Nucl. Sci., vol. 44, pp. 2095-2100, 1997.
26. 2 thin films: Potential applications in a novel memory device," in Conf. Proc. Materials Research Society: Amorphous and Crystalline Insulating Thin Films, vol. 446, 1997, pp. 187-192.