Bias-temperature stress analysis of Cu/ultrathin Ta/SiO2/Si interconnect structure

Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures

Volumn 22, Issue 5, 2004, Pages 2286-2290

  Lim, Boon Kiat ^a   Park, Hun Sub ^a   Chin, Lian Kon ^a   Woo, Sun Woong ^a   See, Alex K H ^b   Seet, Chim Seng ^b   Lee, Tae Jong ^b   Yakovlev, Nikolai L ^c  

^a NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

^b CHARTERED SEMICONDUCTOR MANUFACTURING LTD   (Singapore)

^c INSTITUTE OF MATERIALS RESEARCH AND ENGINEERING   (Singapore)

Author keywords

[No Author keywords available]

Indexed keywords

ACTIVATION ENERGY; CAPACITANCE; CONTAMINATION; DIELECTRIC MATERIALS; IMPURITIES; IONS; MOS CAPACITORS; PHYSICAL VAPOR DEPOSITION; SECONDARY ION MASS SPECTROMETRY; SILICA; SILICON; STRESS ANALYSIS; TANTALUM; ULTRATHIN FILMS;

BIAS TEMPERATURE STRESS (BTS); ELECTRICAL TESTING; INTERCONNECT STRUCTURES; TIME-DEPENDENT DIELECTRIC BREAKDOWN (TDDB);

COPPER;

EID: 9744281200     PISSN: 10711023     EISSN: None     Source Type: Journal    
DOI: 10.1116/1.1781186     Document Type: Article

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