Energy-efficient contention-aware application mapping and scheduling on NoC-based MPSoCs

Journal of Parallel and Distributed Computing

Volumn 96, Issue , 2016, Pages 1-11

  Li, Dawei ^a   Wu, Jie ^a  

^a Temple University   (United States)

Author keywords

Application mapping; Dynamic link frequency tuning; Dynamic voltage scaling; Energy efficient scheduling; Network on chip (NoC)

Indexed keywords

ALGORITHMS; DIRECTED GRAPHS; EMBEDDED SYSTEMS; ENERGY UTILIZATION; GENETIC ALGORITHMS; ITERATIVE METHODS; MAPPING; NETWORK-ON-CHIP; SCHEDULING; SERVERS; SYSTEM-ON-CHIP; TELECOMMUNICATION NETWORKS; VLSI CIRCUITS; VOLTAGE SCALING;

APPLICATION MAPPING; APPLICATION SCHEDULING; DIRECTED ACYCLIC GRAPH (DAG); ENERGY-EFFICIENT SCHEDULING; FREQUENCY-TUNING; NETWORK-ON-CHIP(NOC); QUADRATIC BINARY PROGRAMMING; SYSTEM ENERGY CONSUMPTION;

ENERGY EFFICIENCY;

EID: 84971300807     PISSN: 07437315     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.jpdc.2016.04.006     Document Type: Article

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