Replay debugging: Leveraging record and replay for program debugging

Proceedings - International Symposium on Computer Architecture

Volumn , Issue , 2014, Pages 445-456

  Honarmand, Nima ^a   Torrellas, Josep ^a  

^a UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION PROGRAMS; CODES (SYMBOLS); COMPUTER ARCHITECTURE; COMPUTER DEBUGGING; PROGRAM COMPILERS;

DETERMINISTIC REPLAY; EXECUTABLES; HARDWARE-ASSISTED; PROGRAM BINARY; RECORD-AND-REPLAY; RUN-TIME INFRASTRUCTURE; SOFTWARE BUG;

PROGRAM DEBUGGING;

EID: 84905454052     PISSN: 10636897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCA.2014.6853229     Document Type: Conference Paper

References (47)

1. "GDB: The GNU Project Debugger," http://www.gnu.org/software/ gdb/.
2. "The LLVM Compiler Infrastructure," http://llvm.org/.
3. A. V. Aho, M. S. Lam, R. Sethi, and J. D. Ullman, Compilers: Principles, Techniques, & Tools, 2nd ed. Addison-Wesley, 2007.
4. G. Altekar and I. Stoica, "ODR: Output-Deterministic Replay for Multicore Debugging," in SOSP, October 2009.
5. A. Basu, J. Bobba, and M. D. Hill, "Karma: Scalable Deterministic Record-Replay," in ICS, June 2011.
6. T. Bressoud and F. Schneider, "Hypervisor-Based Fault-Tolerance, " ACM Transactions on Computer Systems, vol. 14, no. 1, February 1996.
7. Y. Chen, W. Hu, T. Chen, and R. Wu, "LReplay: A Pending Period Based Deterministic Replay Scheme," in ISCA, June 2010.
8. J.-D. Choi and H. Srinivasan, "Deterministic Replay of Java Multithreaded Applications," in SPDT, August 1998.
9. J. Chow, T. Garfinkel, and P. M. Chen, "Decoupling Dynamic Program Analysis from Execution in Virtual Environments," in USENIX ATC, June 2008.
10. J. Chow, D. Lucchetti, T. Garfinkel, G. Lefebvre, R. Gardner, J. Mason, S. Small, and P. M. Chen, "Multi-Stage Replay with Crosscut," in VEE, March 2010.
11. G. W. Dunlap, S. T. King, S. Cinar, M. A. Basrai, and P. M. Chen, "ReVirt: Enabling Intrusion Analysis through Virtual-Machine Logging and Replay," in OSDI, December 2002.
12. G. W. Dunlap, D. G. Lucchetti, M. A. Fetterman, and P. M. Chen, "Execution Replay ofMultiprocessor Virtual Machines," in VEE, March 2008.
13. S. I. Feldman and C. B. Brown, "IGOR: A System for Program Debugging via Reversible Execution," in PADD, May 1988.
14. Free Software Foundation, "bc-GNU Project," http://www.gnu.org/software/bc.
15. "Bug in GNU bc-1.06," http://lists.gnu.org/archive/html/bug- gnu-utils/2001-02/msg00118.html.
16. Z. Guo, X. Wang, J. Tang, X. Liu, Z. Xu, M. Wu, M. F. Kaashoek, and Z. Zhang, "R2: An Application-level Kernel for Record and Replay," in OSDI, December 2008.
17. N. Honarmand, N. Dautenhahn, J. Torrellas, S. T. King, G. Pokam, and C. Pereira, "Cyrus: Unintrusive Application-Level Record-Replay for Replay Parallelism," in ASPLOS, March 2013.
18. N. Honarmand and J. Torrellas, "RelaxReplay: Record and Replay for Relaxed-Consistency Multiprocessors," in ASPLOS, March 2014.
19. D. R. Hower and M. D. Hill, "Rerun: Exploiting Episodes for Lightweight Memory Race Recording," in ISCA, June 2008.
20. A. Joshi, S. T. King, G. W. Dunlap, and P. M. Chen, "Detecting Past and Present Intrusions Through Vulnerability-Specific Predicates," in SOSP, October 2005.
21. S. T. King, G. W. Dunlap, and P. M. Chen, "Debugging Operating Systems with Time-Traveling Virtual Machines," in USENIX ATC, April 2005.
22. O. Laadan, N. Viennot, and J. Nieh, "Transparent, Lightweight Application Execution Replay on Commodity Multiprocessor Operating Systems," in ACM SIGMETRICS, June 2010.
23. C. Lattner, "The Architecture of Open Source Applications, chapter LLVM," http://www.aosabook.org/en/llvm.html.
24. T. J. LeBlanc and J. M. Mellor-Crummey, "Debugging Parallel Programs with Instant Replay," IEEE Trans. Comp., April 1987.
25. D. Lee, M. Said, S. Narayanasamy, and Z. Yang, "Offline Symbolic Analysis to Infer Total Store Order," in HPCA, February 2011.
26. D. Lee, M. Said, S. Narayanasamy, Z. Yang, and C. Pereira, "Offline Symbolic Analysis for Multi-Processor Execution Replay," in MICRO, December 2009.
27. D. Lee, B. Wester, K. Veeraraghavan, S. Narayanasamy, P. M. Chen, and J. Flinn, "Respec: Efficient Online Multiprocessor Replay via Speculation and External Determinism," in ASPLOS, March 2010.
28. S. Lu, Z. Li, F. Qin, L. Tan, P. Zhou, and Y. Zhou, "Bugbench: Benchmarks for Evaluating Bug Detection Tools," in Workshop on the Evaluation of Software Defect Detection Tools, June 2005.
29. C.-K. Luk, R. Cohn, R. Muth, H. Patil, A. Klauser, G. Lowney, S. Wallace, V. J. Reddi, and K. Hazelwood, "Pin: Building Customized Program Analysis Tools with Dynamic Instrumentation," in PLDI, 2005.
30. P. Montesinos, L. Ceze, and J. Torrellas, "DeLorean: Recording and Deterministically Replaying Shared-Memory Multiprocessor Execution Efficiently," in ISCA, June 2008.
31. P. Montesinos, M. Hicks, S. T. King, and J. Torrellas, "Capo: A Software-Hardware Interface for Practical DeterministicMultiprocessor Replay," in ASPLOS, March 2009.
32. S. Narayanasamy, C. Pereira, and B. Calder, "Recording Shared Memory Dependencies Using Strata," in ASPLOS, October 2006.
33. S. Narayanasamy, G. Pokam, and B. Calder, "BugNet: Continuously Recording Program Execution for Deterministic Replay Debugging," in ISCA, June 2005.
34. S. Park, Y. Zhou, W. Xiong, Z. Yin, R. Kaushik, K. H. Lee, and S. Lu, "PRES: Probabilistic Replay with Execution Sketching on Multiprocessors," in SOSP, October 2009.
35. H. Patil, C. Pereira, M. Stallcup, G. Lueck, and J. Cownie, "PinPlay: A Framework for Deterministic Replay and Reproducible Analysis of Parallel Programs," in CGO, April 2010.
36. G. Pokam, K. Danne, C. Pereira, R. Kassa, T. Kranich, S. Hu, J. Gottschlich, N. Honarmand, N. Dautenhahn, S. T. King, and J. Torrellas, "QuickRec: Prototyping an Intel Architecture Extension for Record and Replay of Multithreaded Programs," in ISCA, June 2013.
37. G. Pokam, C. Pereira, K. Danne, R. Kassa, and A.-R. Adl-Tabatabai, "Architecting a Chunk-Based Memory Race Recorder inModern CMPs," in MICRO, December 2009.
38. G. Pokam, C. Pereira, S. Hu, A.-R. Adl-Tabatabai, J. Gottschlich, H. Jungwoo, and Y. Wu, "CoreRacer: A Practical Memory Race Recorder for Multicore x86 TSO Processors," in MICRO, December 2011.
39. X. Qian, H. Huang, B. Sahelices, and D. Qian, "Rainbow: Efficient Memory Dependence Recording with High Replay Parallelism for Relaxed Memory Model," in HPCA, February 2013.
40. Y. Saito, "Jockey: A User-space Library for Record-replay Debugging," in AADEBUG, September 2005.
41. S. M. Srinivasan, S. Kandula, C. R. Andrews, and Y. Zhou, "Flashback: A Lightweight Extension for Rollback and Deterministic Replay for Software Debugging," in USENIX ATC, June 2004.
42. K. Veeraraghavan, D. Lee, B. Wester, J. Ouyang, P. M. Chen, J. Flinn, and S. Narayanasamy, "DoublePlay: Parallelizing Sequential Logging and Replay," in ASPLOS, March 2011.
43. N. Viennot, S. Nair, and J. Nieh, "Transparent Mutable Replay for Multicore Debugging and Patch Validation," in ASPLOS, March 2013.
44. Virtutech, "Using Simics Hindsight for Software Development," http://www.virtutech.com/files/manuals/using-simics-for-software-development-0. pdf.
45. G. Voskuilen, F. Ahmad, and T. N. Vijaykumar, "Timetraveler: Exploiting Acyclic Races for Optimizing Memory Race Recording," in ISCA, June 2010.
46. M. Xu, R. Bodik, and M. D. Hill, "A "Flight Data Recorder" for Enabling Full-System Multiprocessor Deterministic Replay," in ISCA, June 2003.
47. "A Regulated Transitive Reduction (RTR) for Longer Memory Race Recording," in ASPLOS, 2006.