Rainbow: Efficient memory dependence recording with high replay parallelism for relaxed memory model

Proceedings - International Symposium on High-Performance Computer Architecture

Volumn , Issue , 2013, Pages 554-565

  Qian, Xuehai ^a   Huang, He ^b   Sahelices, Benjamin ^c   Qian, Depei ^d  

^a UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

^b AMD Products (China) Co Ltd   (China)

^c UNIVERSITY OF VALLADOLID   (Spain)

^d BEIHANG UNIVERSITY   (China)

Author keywords

[No Author keywords available]

Indexed keywords

HARDWARE OVERHEADS; INTRUSION ANALYSIS; MEMORY CONSISTENCY MODELS; MULTI-THREADED APPLICATION; RECORD-AND-REPLAY; RELAXED MEMORY MODELS; SEQUENTIAL CONSISTENCY; VIOLATION DETECTIONS;

COMPUTER ARCHITECTURE; FAULT TOLERANCE; SUPERCOMPUTERS;

JAVA PROGRAMMING LANGUAGE;

EID: 84880253977     PISSN: 15300897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/HPCA.2013.6522349     Document Type: Conference Paper

References (29)

1. H. Agrawal et al. , "An Execution-Backtracking Approach to Debugging?" IEEE Software, vol. 8, no. 3. May 1 99 1 .
2. G Altekar and I Stoica, "ODR: Output-deterministic Replay for Multicore Debugging," in Symp. on Operating Systems Principles, 2009 .
3. D. F. Bacon et al. , "Hardware-Assisted Replay of Multiprocessor Programs." in ACMIONR Workshop On Parallel and Distributed Debugging, published in ACM SIGPLAN Notices, 1 99 1 .
4. A Basu e t al. , "Karma: Scalable Deterrrtinistic Record-Replay," in International Conference on Supercomputing, 201 1 .
5. T. Bressoud and F. Schneider, "Hypevisor-based Fault-tolerance, " ACM Transactions on Computer Systems, vol. 14, no. I, Feb 1 996.
6. L. Ceze et al. , "BulkSC: Bulk Enforcement of Sequential Consistency," in Int. Symp. on Computer Architecture, 2007 .
7. Y. Chen et al. , "LReplay: A Pending Period based Detenninistic Replay Scheme," in Int. Symp. on Computer Architecture, 20 1 0 .
8. J.-D. Choi and H. Srinivasan, "Deterrrtinistic Replay o f Java Multithreaded Applications," in Symposium on Parallel and Distributed Tools, 1 9 9 8 .
9. B Cully et al. , "Remus: High Availability v i a Asynchronous Virtual Machine Replication," in USENIX Symposium on Networked Systems Design and Implementation, 2008.
10. G. W. Dunlap et al. , "ReVirt: Enabling Intrusion Analysis through Virtual-machine Logging and Replay," in Symposium on Operating Systems Design and Implementation, 2002.
11. G. W. Dunlap et al., "Execution Replay of Multiprocessor Virtual Machines," in International Conference on Virtual Execution Environments, 200 8 .
12. K. Gharachorloo, A Gupta, and J. L. Hennessy, "Two Techniques to Enhance the Performance of Memory Consistency Models." August 1 99 1 , pp. 355-364.
13. D. R. Hower and M. D. Hili, "Rerun: Exploiting Episodes for Lightweight Memory Race Recording," in Int. Symp. on Computer Architecture, 2008.
14. S. T. King and P. M. Chen, "Backtracking intrusions," in Symposium on Operating Systems Principles, 2003.
15. S. T. King et al. , "Debugging operating systems with time-traveling virtual machines," in USENIX Annual Technical Conference, 2005.
16. T. J. LeBlanc and 1. M. Mellor-Crummey, "Debugging Parallel Programs with Instant Replay," IEEE Trans. Comput. , vol. 36, no. 4, Apr. 1 9 8 7 .
17. D. Lee et al. , "Respec: Efficient Online Multiprocessor Replay via Speculation and External Determinism," in Architectural Support for Programming Languages and Operating Systems, 20 1 0 .
18. P. Montesinos et al. , "DeLorean: Recording and Detenninistically Replaying Shared-Memory Multiprocessor Execution Efficiently," in Int. Symp. on Computer Architecture, 2008.
19. P. Montesinos et al., "Capo: A Software-Hardware Interface for Practical Detenninistic Multiprocessor Replay," in Int. Con! on Architectural Support for Programming Languages and Operating Systems, 2009 .
20. S. Narayanasamy et al. , "Recording Shared Memory Dependencies Using Strata," in International Conference on Architectural Support for Programming Languages and Operating Systems, 2006 .
21. S. Park et al. , "PRES: Probabilistic Replay with Execution Sketching on Multiprocessors," in Symp. on Operating Systems Principles, 2009 .
22. G. Pokam et al. , "Architecting a Chunk-based Memory Race Recorder in Modern CMPs," in Int. Symposium on Microarchitecture, 2009 .
23. G. Pokam et al., "CoreRacer: A Practical Memory Race Recorder for Multicore X86 TSO Processors," in Int. Symp. on Microarchitecture, 20 1 1 .
24. M Russinovich and B Cogswell, "Replay for Concurrent Nondetenninistic Shared-memory Applications," in Programming Language Design and Implementation, 1 996.
25. S. M. Srinivasan et al. , "Flashback: A Lightweight Extension for Rollback and Deterministic Replay for Software Debugging," in USENIX Annual Technical Conference, 2004.
26. K. Veeraraghavan et al. , "DoublePlay: Parallelizing Sequential Logging and Replay," in Architectural Support for Programming Languages and Operating Systems, 201 1 .
27. G Voskuilen e t al. , "Timetraveler: Exploiting Acyclic Races for Optimizing Memory Race Recording," in Int. Symp. on Computer Architecture, 20 1 O .
28. M. X u et al. , " A "Flight Data Recorder" for Enabling Full-system Multiprocessor Deterministic Replay," in Int. Symp. on Computer Architecture, 200 3 .
29. M. X u et al, " A Regulated Transitive Reduction (RTR) for Longer Memory Race Recording," in International Conference on Architectural Support for Programming Languages and Operating Systems, 2006 .