CoreRacer: A practical memory race recorder for multicore x86 TSO processors

Proceedings of the Annual International Symposium on Microarchitecture, MICRO

Volumn , Issue , 2011, Pages 216-225

  Pokam, Gilles ^a   Pereira, Cristiano ^a   Hu, Shiliang ^a   Adl Tabatabai, Ali Reza ^a   Gottschlich, Justin ^a   Ha, Jungwoo ^b   Wu, Youfeng ^a  

^a INTEL CORPORATION   (United States)

^b GOOGLE INC   (United States)

Author keywords

determinism; deterministic replay; memory race recorder

Indexed keywords

CACHE COHERENCE; COHERENCE PROTOCOL; CURRENT PROCESSORS; CYCLE ACCURATE; DETERMINISM; DETERMINISTIC REPLAY; INTEGRATION COSTS; INTERLEAVINGS; MEMORY MODELS; MEMORY OPERATIONS; MULTI CORE; SHARED MEMORIES; SHARED MEMORY MULTIPROCESSOR; TIME-STAMP;

MEMORY ARCHITECTURE; PROGRAM PROCESSORS;

MULTICORE PROGRAMMING;

EID: 84863350340     PISSN: 10724451     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/2155620.2155646     Document Type: Conference Paper

References (29)

1. W. Ahn, S. Qi, M. Nicolaides, J. Torrellas, J.-W. Lee, X. Fang, S. Midkiff, and D. Wong. BulkCompiler: High-performance Sequential Consistency Through Cooperative Compiler and Hardware Support. In Proceedings of the International Symposium on Microarchitecture, 2009.
2. G. Altekar and I. Stoica. ODR: Output-deterministic Replay for Multicore Debugging. In Symposium on Operating System Principles, 2009.
3. A. Basu, J. Bobba, and M. D. Hill. Karma: Scalable Deterministic Record-Replay. In International Conference on Supercomputing, 2011.
4. T. C. Bressoud and F. B. Schneider. Hypervisor-based fault tolerance. ACM Trans. Comput. Syst., 14:80-107, February 1996.
5. R. H. Carver and K.-C. Tai. Replay and testing for concurrent programs. IEEE Softw., 8:66-74, March 1991.
6. L. Ceze, J. Tuck, J. Torrellas, and C. Cascaval. Bulk Disambiguation of Speculative Threads in Multiprocessors. In Proceedings of the International Symposium on Computer Architecture, 2006.
7. Y. Chen, W. Hu, T. Chen, and R. Wu. LReplay: a pending period based deterministic replay scheme. In Proceedings of the International Symposium on Computer Architecture, 2010.
8. G. Dunlap, S. King, S. Cinar, M. Basrai, and P. Chen. Revirt: Enabling intrusion analysis through virtual-machine logging and replay. In OSDI, 2002.
9. G. Dunlap, D. Lucchetti, M. Fetterman, and P. Chen. Execution replay of multiprocessor virtual machines. In International Conference on Virtual Execution Environments, 2008.
10. D. Hower and M. Hill. Rerun: Exploiting episodes for lightweight memory race recording. In Proceedings of the International Symposium on Computer Architecture, 2008.
11. Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 3A: System Programming Guide, Chapter 10, 2010.
12. S. T. King, G. W. Dunlap, and P. M. Chen. Operating System Support for Virtual Machines. In Proceedings of the USENIX Annual Technical Conference, 2003.
13. D. Lee, M. Said, S. Narayanasamy, and Z. Yang. Offline symbolic analysis to infer total store order. In Proceedings of the International Symposium on High-Performance Computer Architecture, 2011.
14. P. Montesinos, L. Ceze, and J. Torrellas. DeLorean: Recording and Deterministically Replaying Shared-Memory Multiprocessor Execution Efficiently. In Proceedings of the International Symposium on Computer Architecture, 2008.
15. P. Montesinos, M. Hicks, S. King, and J. Torrellas. Capo: A Software-Hardware Interface for Practical Deterministic Multiprocessor Replay. In Proceedings of the International Conference on Architectural Support for Programming Languages and Operating Systems, 2009.
16. S. Narayanasamy, C. Pereira, and B. Calder. Recording shared memory dependencies using strata. In Proceedings of the International Conference on Architectural Support for Programming Languages and Operating Systems, 2006.
17. S. Narayanasamy, G. Pokam, and B. Calder. BugNet: Continuously Recording Program Execution for Deterministic Replay Debugging. In Proceedings of the International Symposium on Computer Architecture, 2005.
18. S. Park, Y. Zhou, W. Xiong, Z. Yin, R. Kaushik, K. H. Lee, and S. Lu. PRES: Probabilistic Replay with Execution Sketching on Multiprocessors. In Symposium on Operating System Principles, 2009.
19. H. Patil, C. Pereira, M. Stallcup, G. Lueck, and J. Cownie. PinPlay: a Framework for Deterministic Replay and Reproducible Analysis of Parallel Programs. In CGO, 2010.
20. C. Pereira, G. Pokam, K. Danne, R. Devarajan, and A.-R. Adl-Tabatabai. Virtues and obstacles of hardware-assisted multi-processor execution replay. In HotPAR, 2010.
21. G. Pokam, C. Pereira, K. Danne, R. Kassa, and A.-R. Adl-Tabatabai. Architecting a Chunk-based Memory Race Recorder in Modern CMPs. In Proceedings of the International Symposium on Microarchitecture, 2009.
22. G. Pokam, C. Pereira, K. Danne, L. Yang, S. King, and J. Torrellas. Hardware and software approaches for deterministic multi-processor replay of concurrent programs. Intel Technology Journal, 13(4), Dec. 2009.
23. D. Sanchez, L. Yen, M. D. Hill, and K. Sankaralingam. Implementing signatures for transactional memory. In Proceedings of the International Symposium on Microarchitecture, 2007.
24. J. P. Shen and M. H. Lipasti. Modern Processor Design: Fundamentals of Superscalar Processors. McGraw-Hill Higher Education, 2005.
25. T. Sherwood, E. Perelman, G. Hamerly, and B. Calder. Automatically characterizing large scale program behavior. In Proceedings of the International Conference on Architectural Support for Programming Languages and Operating Systems, 2002.
26. S. Srinivasan, S. Kandula, C. Andrews, and Y. Zhou. Flashback: A lightweight extension for rollback and deterministic replay for software debugging. In Proceedings of the USENIX Annual Technical Conference, 2004.
27. VMWare. vsphere availability guide.
28. M. Xu, R. Bodik, and M. Hill. A flight data recorder for enabling full-system multiprocessor deterministic replay. In Proceedings of the International Symposium on Computer Architecture, 2003.
29. M. Xu, R. Bodík, and M. D. Hill. A Regulated Transitive Reduction (RTR) for Longer Memory Race Recording. In Proceedings of the International Conference on Architectural Support for Programming Languages and Operating Systems, 2006.