An offset-canceling triple-stage sensing circuit for deep submicrometer STT-RAM

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 22, Issue 7, 2014, Pages 1620-1624

  Na, Taehui ^a   Kim, Jisu ^a   Kim, Jung Pill ^b   Kang, Seung H ^b   Jung, Seong Ook ^a  

^a Yonsei University   (South Korea)

^b QUALCOMM INC   (United States)

Author keywords

Low current; magnetoresistive random access memory (MRAM); offset cancelation; sensing circuit; sensing margin; spin transfer torque random access memory (STT RAM); triple stage.

Indexed keywords

MONTE CARLO METHODS; MRAM DEVICES; NANOTECHNOLOGY; RANDOM ACCESS STORAGE; WORK SIMPLIFICATION;

LOW CURRENTS; OFFSET CANCELATION; SENSING CIRCUITS; SENSING MARGIN; SPIN-TRANSFER TORQUE RANDOM ACCESS MEMORY (STT-RAM);

SPICE;

EID: 84903718188     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2013.2294095     Document Type: Article

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