-
1
-
-
77049110379
-
2-Terminal carbon nanotube programmable devices for adaptive architectures
-
AGNUS G. ET AL. 2010. 2-terminal carbon nanotube programmable devices for adaptive architectures. Advanced Material 22, 6, 702-706..
-
(2010)
Advanced Material
, vol.22
, Issue.6
, pp. 702-706
-
-
Agnus, G.1
-
2
-
-
60549098976
-
A hybrid nanomemristor/transistor logic circuit capable of self-Programming
-
BORGHETTI, J. ET AL. 2009. A hybrid nanomemristor/transistor logic circuit capable of self-programming. PNAS, 106, 6, 1699-1703..
-
(2009)
PNAS
, vol.106
, Issue.6
, pp. 1699-1703
-
-
Borghetti, J.1
-
3
-
-
77950852717
-
Memristive switches enable stateful logic operations via material implication
-
BORGHETTI, J. ET AL. 2010. Memristive switches enable stateful logic operations via material implication. Nature 464, 873-876..
-
(2010)
Nature
, vol.464
, pp. 873-876
-
-
Borghetti, J.1
-
6
-
-
0037392525
-
Nanoscale molecular-Switch crossbar circuits
-
CHEN, Y. ET AL. 2003. Nanoscale molecular-switch crossbar circuits. Nanotechnology 14, 4, 462-468
-
(2003)
Nanotechnology
, vol.14
, Issue.4
, pp. 462-468
-
-
Chen, Y.1
-
7
-
-
20344384015
-
A two-Level redundancy scheme for enhancing scalability of molecularbased crossbar memories
-
CHOI, Y., LEE, M., AND KIM, Y. 2004. A two-level redundancy scheme for enhancing scalability of molecularbased crossbar memories. In Proceedings of the 4th IEEE Conference on Nanotechnology. pp. 505-508
-
(2004)
Proceedings of the 4th IEEE Conference on Nanotechnology
, pp. 505-508
-
-
Choi, Y.1
Lee, M.2
Kim, Y.3
-
8
-
-
0142037327
-
Imprint of sub-25 nm vias and trenches in polymers
-
CHOU, S. Y. ET AL. 1995. Imprint of sub-25 nm vias and trenches in polymers. Appl. Phys. Lett. 67, 3114-3116
-
(1995)
Appl. Phys. Lett
, vol.67
, pp. 3114-3116
-
-
Chou, S.Y.1
-
9
-
-
0016918810
-
Memristive devices and systems
-
CHUA, L. O. AND KANG, S. M. 1976. Memristive devices and systems. Proc. IEEE 64, 209-223
-
(1976)
Proc.IEEE
, vol.64
, pp. 209-223
-
-
Chua, L.O.1
Kang, S.M.2
-
10
-
-
33748417712
-
Mixed-Signal neuron-Synapse implementation for large-Scale neural network
-
HAN, S. 2006. Mixed-signal neuron-synapse implementation for large-scale neural network. Neurocomputing 16, 1860-1867
-
(2006)
Neurocomputing
, vol.16
, pp. 1860-1867
-
-
Han, S.1
-
11
-
-
42449083264
-
Design and electrical simulation of on-Chip neural learning based on nanocomponents
-
HE, M.,KLEIN, J.-O., AND BELHAIRE, E. 2008. Design and electrical simulation of on-chip neural learning based on nanocomponents. Electron. Lett. 44, 9, 575-576..
-
(2008)
Electron. Lett
, vol.44
, Issue.9
, pp. 575-576
-
-
He, M.1
Klein, J.-O.2
Belhaire, E.3
-
12
-
-
0032510985
-
A defect-Tolerant computer architecture: Opportunities in nanotechnology
-
HEATH, J. R. ET AL. 1998. A defect-tolerant computer architecture: Opportunities in nanotechnology. Science 280, 5370, 1716-1721
-
(1998)
Science
, vol.280
, Issue.5370
, pp. 1716-1721
-
-
Heath, J.R.1
-
13
-
-
0035834415
-
Logic gates and computation from assembled nanowire buiding blocks
-
HUANG, Y. ET AL. 2001. Logic gates and computation from assembled nanowire buiding blocks. Science 294, 1313-1317
-
(2001)
Science
, vol.294
, pp. 1313-1317
-
-
Huang, Y.1
-
14
-
-
77951026760
-
-
Nano Lett
-
JO, S. H., CHANG, T., EBONG, I., BHADVIYA, B. B., MAZUMDER, P., AND LU, W. 2010. Nanoscale memristor device as synapse in neuromorphic systems. Nano Lett. 10, 4, 1297-1301
-
(2010)
Nanoscale Memristor Device As Synapse in Neuromorphic Systems
, vol.10
, Issue.4
, pp. 1297-1301
-
-
Jo, S.H.1
Chang, T.2
Ebong, I.3
Bhadviya, B.B.4
Mazumder, P.5
Lu, W.6
-
15
-
-
63649138779
-
High-Density crossbar arrays based on a si memristive system RID C-8780-2011 RID E-8388-2011
-
JO, S. H., KIM, K.-H., AND LU, W. 2009. High-density crossbar arrays based on a si memristive system RID C-8780-2011 RID E-8388-2011. Nano Letters 9, 2, 870-874
-
(2009)
Nano Letters
, vol.9
, Issue.2
, pp. 870-874
-
-
Jo, S.H.1
Kim, K.-H.2
Lu, W.3
-
16
-
-
0141466590
-
Robustness in multilayer perceptrons
-
KERLIRZIN, P. AND VALLET, F. 1993. Robustness in Multilayer Perceptrons. Neural Computat. 5, 3, 473-482
-
(1993)
Neural Computat
, vol.5
, Issue.3
, pp. 473-482
-
-
Kerlirzin, P.1
Vallet, F.2
-
17
-
-
29144522055
-
Guided growth of large-Scale, horizontally aligned arrays of single-Walled carbon nanotubes and their use in thin-Film transistors
-
KOCKABAS, C. ET AL. 2005 Guided growth of large-scale, horizontally aligned arrays of single-walled carbon nanotubes and their use in thin-film transistors. Small 1, 1110-1116
-
(2005)
Small
, vol.1
, pp. 1110-1116
-
-
Kockabas, C.1
-
18
-
-
18744397824
-
Defect-Tolerant interconnect to nanoelectronic circuits: Internally redundant demultiplexers based on error-Correcting codes
-
KUEKES, P ET AL. 2005. Defect-tolerant interconnect to nanoelectronic circuits: Internally redundant demultiplexers based on error-correcting codes. Nanotechnology 16, 869-882
-
(2005)
Nanotechnology
, vol.16
, pp. 869-882
-
-
Kuekes, P.1
-
19
-
-
34249809769
-
Defect-Tolerant nanoelectronic pattern classifiers
-
LEE, J. H. AND LIKHAREV, K. K. 2007. Defect-tolerant nanoelectronic pattern classifiers. Int. J. Circuit Theory Appl. 35, 3, 239-264
-
(2007)
Int. J. Circuit Theory Appl
, vol.35
, Issue.3
, pp. 239-264
-
-
Lee, J.H.1
Likharev, K.K.2
-
20
-
-
80052875968
-
Design of neuro-inspired learning circuit using OG-CNTFETmodelling and technology
-
LIAO S. Y. ET AL. 2011. Design of neuro-inspired learning circuit using OG-CNTFETmodelling and technology, IEEE Trans. CAS I, 58, 2172-2181
-
(2011)
IEEE Trans. CAS I
, vol.58
, pp. 2172-2181
-
-
Liao, S.Y.1
-
21
-
-
77957010403
-
Cross-Point memory array without cell selectors-Device characteristics and data storage pattern dependencies
-
LIANG, J. AND WONG, H.-S. 2010. Cross-Point Memory Array Without Cell Selectors-Device Characteristics and Data Storage Pattern Dependencies. IEEE Trans. Electron Devices, 57, 2531-2538
-
(2010)
IEEE Trans. Electron Devices
, vol.57
, pp. 2531-2538
-
-
Liang, J.1
Wong, H.-S.2
-
22
-
-
77951622926
-
Complementary resistive switches for passive nanocrossbar memories
-
LINN, E., ROSEZIN, R., KUGELER, C., AND WASER, R. 2010. Complementary resistive switches for passive nanocrossbar memories. Nat. Mater. 9, 5, 403-406
-
(2010)
Nat. Mater
, vol.9
, Issue.5
, pp. 403-406
-
-
Linn, E.1
Rosezin, R.2
Kugeler, C.3
Waser, R.4
-
24
-
-
84892565845
-
Fault-Tolerance technique for nanocomputer
-
NIKOLÍC, K., SADEK, A., AND FORSHAW, M. 2002. Fault-tolerance technique for nanocomputer. Nanotechnology 13, 280-346..
-
(2002)
Nanotechnology
, vol.13
, pp. 280-346
-
-
Nikolíc, K.1
Sadek, A.2
Forshaw, M.3
-
25
-
-
79961194061
-
Learning with memristive devices: How should we model their behavior?
-
(NANOARCH 2011)
-
QUERLIOZ, D., DOLLFUS, P., BICHLER, O., AND GAMRAT, C. 2011b. Learning with memristive devices: How should we model their behavior? In Proceedings of IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH 2011)
-
(2011)
Proceedings of IEEE/ACM International Symposium on Nanoscale Architectures
-
-
Querlioz, D.1
Dollfus, P.2
Bichler, O.3
Gamrat, C.4
-
26
-
-
84872962355
-
A scalable neuristor built withMottmemristors
-
PICKETT,M. D.MEDEIROS-RIBEIRO, G., ANDWILLIAMS, R. S. 2013. A scalable neuristor built withMottmemristors. Nat. Mater. 12, 2, 114-117
-
(2013)
Nat. Mater
, vol.12
, Issue.2
, pp. 114-117
-
-
Pickettm, D.1
Medeiros-Ribeiro, G.2
Williams, R.S.3
-
27
-
-
79956129424
-
Analog memory and spike-Timing-Dependent plasticity characteristics of a nanoscale titanium oxide bilayer resistive switching device
-
SEO K. ET AL. 2011. Analog memory and spike-timing-dependent plasticity characteristics of a nanoscale titanium oxide bilayer resistive switching device. Nanotechnology. 22, 25, 254023
-
(2011)
Nanotechnology
, vol.22
, Issue.25
, pp. 254023
-
-
Seo, K.1
-
28
-
-
34548685897
-
Self-Organized computation with unreliable, memristive nanodevices
-
SNIDER, G. S. 2007. Self-organized computation with unreliable, memristive nanodevices. Nanotechnology, 18, 36, 365202
-
(2007)
Nanotechnology
, vol.18
, Issue.36
, pp. 365202
-
-
Snider, G.S.1
-
29
-
-
18744373862
-
CMOL FPGA: A reconfigurable architecture for hybrid digital circuits with two-Terminal nanodevices RID B-2689-2009
-
STRUKOV, D. AND LIKHAREV, K. 2005. CMOL FPGA: A reconfigurable architecture for hybrid digital circuits with two-terminal nanodevices RID B-2689-2009. Nanotechnology 16, 6, 888-900
-
(2005)
Nanotechnology
, vol.16
, Issue.6
, pp. 888-900
-
-
Strukov, D.1
Likharev, K.2
-
30
-
-
43049126833
-
The missing memristor found
-
STRUKOV, D. B., SNIDER, G. S., STEWART, D. R., AND WILLIAMS, R. S. 2008. The missing memristor found. Nature, 453, 80-83
-
(2008)
Nature
, vol.453
, pp. 80-83
-
-
Strukov, D.B.1
Snider, G.S.2
Stewart, D.R.3
Williams, R.S.4
-
31
-
-
77649283997
-
Defect tolerance in crossbar array nano-Architectures
-
M. Tehranipoor, ed., Springer
-
TAHOORI, M. B. 2008. Defect tolerance in crossbar array nano-architectures. In Emerging Nanotechnologies: Test, Defect Tolerance, and Reliability. M. Tehranipoor, ed., Springer. 121-151
-
(2008)
Emerging Nanotechnologies: Test, Defect Tolerance, and Reliability
, pp. 121-151
-
-
Tahoori, M.B.1
-
32
-
-
0022721216
-
Simple 'neural'optimization networks: An A/D converter, signal decision circuit, and a linear programming circuit
-
TANK, D. AND HOPFIELD, J. 1986. Simple 'neural' optimization networks: An A/D converter, signal decision circuit, and a linear programming circuit. IEEE Trans. Circ. Syst. 33, 5, 533
-
(1986)
IEEE Trans. Circ. Syst
, vol.33
, Issue.5
, pp. 533
-
-
Tank, D.1
Hopfield, J.2
-
33
-
-
66049144283
-
Resistive non-Volatile memory devices (Invited Paper)
-
WASER, R. 2009. Resistive non-volatile memory devices (Invited Paper). Microelectron. Eng. 86, 7-9, 1925- 1928
-
(2009)
Microelectron. Eng
, vol.86
, Issue.7-9
, pp. 1925-1928
-
-
Waser, R.1
-
35
-
-
70349778694
-
A family of electronically reconfiguiable nanodevices
-
YANG, J. J., BORGHETTI, J., MURPHY, D., STEWART, D. R., AND WILLIAMS, R. S. 2009. A family of electronically reconfiguiable nanodevices. Adv Mater 21, 3754-3758..
-
(2009)
Adv Mater
, vol.21
, pp. 3754-3758
-
-
Yang, J.J.1
Borghetti, J.2
Murphy, D.3
Stewart, D.R.4
Williams, R.S.5
-
36
-
-
84859984075
-
Engineering nonlinearity into memristors for passive crossbar applications
-
YANG, J. ET AL. 2012. Engineering nonlinearity into memristors for passive crossbar applications. Appl. Phys. Lett. 100, 11, 113501-113501-4
-
(2012)
Appl. Phys. Lett
, vol.100
, Issue.11
, pp. 113501-1135014
-
-
Yang, J.1
-
37
-
-
79952640478
-
Investigating the switching dynamics and multilevel capability of bipolar metal oxide resistive switching memory
-
YU, S., WU, Y., AND WONG, H.-S. P. 2011. Investigating the switching dynamics and multilevel capability of bipolar metal oxide resistive switching memory. Appl. Phys. Lett. 98, 10, 103514
-
(2011)
Appl. Phys. Lett.
, vol.98
, Issue.10
, pp. 103514
-
-
Yu, S.1
Wu, Y.2
Wong, H.-S.P.3
-
38
-
-
72849144796
-
Memristor-CMOS hybrid integrated circuits for reconfigurable logic
-
XIA, Q. ET AL. 2009. Memristor-CMOS hybrid integrated circuits for reconfigurable logic. Nano Lett. 9, 3640-5
-
(2009)
Nano Lett
, vol.9
, pp. 3640-3645
-
-
Xia, Q.1
-
39
-
-
77954751982
-
Nanotube devices based crossbar architecture: Toward neuromorphic computing
-
ZHAO, W. S. ET AL. 2010. Nanotube devices based crossbar architecture: Toward neuromorphic computing, Nanotechnology 21, 175202
-
(2010)
Nanotechnology
, vol.21
, pp. 175202
-
-
Zhao, W.S.1
-
40
-
-
84866125003
-
Cross-Point architecture for spin transfer torque magnetic random access memory
-
ZHAO, W. S. ET AL. 2012. Cross-point architecture for spin transfer torque magnetic random access memory, IEEE Trans. Nanotech. 11, 907-917
-
(2012)
IEEE Trans. Nanotech
, vol.11
, pp. 907-917
-
-
Zhao, W.S.1
-
41
-
-
0344012623
-
Nanowire crossbar arrays as address decoders for integrated nanosystems
-
ZHONG, Z. ET AL. 2003. Nanowire crossbar arrays as address decoders for integrated nanosystems. Science 302, 1377
-
(2003)
Science
, vol.302
, pp. 1377
-
-
Zhong, Z.1
|