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Volumn 9781441967787, Issue , 2012, Pages 107-137

System exploration

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION MAPPING; FAST SIMULATION; MASSIVELY PARALLEL COMPUTING; MODELLING AND SIMULATIONS; MODERATE COMPLEXITY; PROCESSING CAPACITIES; SYSTEM ARCHITECTS; SYSTEM-LEVEL PERFORMANCE;

EID: 84892372280     PISSN: None     EISSN: None     Source Type: Book    
DOI: 10.1007/978-1-4419-6778-7_5     Document Type: Chapter
Times cited : (2)

References (31)
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    • Benini, L.1    Bogliolo, A.2    DeMicheli, G.3
  • 5
    • 27644585187 scopus 로고    scopus 로고
    • A power estimation methodology for SystemC transaction level models
    • September
    • N. Dhanwada, I. C. Lin, and V. Narayanan. A power estimation methodology for SystemC transaction level models. In ACM Proceedings of CODES+ISSS05, pages 142-147, September 2005.
    • (2005) ACM Proceedings of CODES+ISSS05 , pp. 142-147
    • Dhanwada, N.1    Lin, I.C.2    Narayanan, V.3
  • 9
    • 9644281035 scopus 로고    scopus 로고
    • Methods for evaluating and covering the design space during early design development
    • M. Gries. Methods for evaluating and covering the design space during early design development. Integration, the VLSI Journal, 38(2):131-183, 2004.
    • (2004) Integration, the VLSI Journal , vol.38 , Issue.2 , pp. 131-183
    • Gries, M.1
  • 10
    • 39749200969 scopus 로고    scopus 로고
    • Case study of a low power MTCMOS based ARM926 SoC: Design, analysis and test challenges
    • October
    • S. Idgunji. Case study of a low power MTCMOS based ARM926 SoC: Design, analysis and test challenges. In IEEE International Test Conference (ITC), pages 1-10, October 2007.
    • (2007) IEEE International Test Conference (ITC) , pp. 1-10
    • Idgunji, S.1
  • 13
    • 33847207802 scopus 로고    scopus 로고
    • Exploitation of UML 2.0-based platform service model and SystemC workload simulation in MPEG-4 partitioning
    • J. Kreku, M. Eteläperä, and J-P. Soininen. Exploitation of UML 2.0-based platform service model and SystemC workload simulation in MPEG-4 partitioning. In International Symposium on System-on-Chip Proceedings, pages 167-170, 2005.
    • (2005) International Symposium on System-on-chip Proceedings , pp. 167-170
    • Kreku, J.1    Eteläperä, M.2    Soininen, J.-P.3
  • 21
    • 16244376510 scopus 로고    scopus 로고
    • Power analysis of system-level on-chip communication architectures
    • September
    • K. Lahiri and A. Raghunathan. Power analysis of system-level on-chip communication architectures. In ACM Proceedings of CODES+ISSS04, pages 236-241, September 2004.
    • (2004) ACM Proceedings of CODES+ISSS04 , pp. 236-241
    • Lahiri, K.1    Raghunathan, A.2
  • 26
    • 67650503777 scopus 로고    scopus 로고
    • Mpa: Parallelizing an application onto a multicore platform made easy
    • May-June
    • J.-Y. Mignolet, R. Baert, T. J. Ashby, P. Avasare, Hye-On Jang, and Jae Cheol Son. Mpa: Parallelizing an application onto a multicore platform made easy. IEEE Micro, 29(3):31-39, May-June 2009.
    • (2009) IEEE Micro , vol.29 , Issue.3 , pp. 31-39
    • Mignolet, J.-Y.1    Baert, R.2    Ashby, T.J.3    Avasare, P.4    Jang, H.5    Son, J.C.6
  • 27
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    • 33744721815 scopus 로고    scopus 로고
    • A systematic approach to exploring embedded system architectures at multiple abstraction levels
    • A. Pimentel, C. Erbas, and S. Polstra. A systematic approach to exploring embedded system architectures at multiple abstraction levels. IEEE Transactions on Computers, 55(2):99-112, 2006.
    • (2006) IEEE Transactions on Computers , vol.55 , Issue.2 , pp. 99-112
    • Pimentel, A.1    Erbas, C.2    Polstra, S.3
  • 31
    • 33749010321 scopus 로고    scopus 로고
    • TAPES - Trace-based architecture performance evaluation with SystemC
    • Special Issue on SystemC-based System Modeling, Verification and Synthesis
    • T. Wild, A. Herkersdorf, and G.-Y. Lee. TAPES - trace-based architecture performance evaluation with SystemC. Design Automation for Embedded Systems, 10(2-3):157-179, 2006. Special Issue on SystemC-based System Modeling, Verification and Synthesis.
    • (2006) Design Automation for Embedded Systems , vol.10 , Issue.2-3 , pp. 157-179
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.