IEM926: An energy efficient SoC with dynamic voltage scaling

Proceedings - Design, Automation and Test in Europe Conference and Exhibition

Volumn , Issue , 2004, Pages 324-327

  Flautner, Krisztián ^a   Flynn, David ^a   Roberts, David ^a   Patel, Dipesh I ^a  

^a ARM LTD   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

DYNAMIC VOLTAGE SCALING (DVS); EMBEDDED PROCESSORS; SOFTWARE COMPONENTS; TIGHTLY COUPLED MEMORIES (TCM);

COMPUTER PERIPHERAL EQUIPMENT; COMPUTER SOFTWARE; ELECTRIC POTENTIAL; EMBEDDED SYSTEMS; ENERGY EFFICIENCY; ENERGY UTILIZATION; MOBILE TELECOMMUNICATION SYSTEMS; OPTIMIZATION;

MICROPROCESSOR CHIPS;

EID: 3042563382     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2004.1269261     Document Type: Conference Paper

References (6)

1. S. Dhar, D. Maksimovic, and B. Kranzen. Closed-Loop Adaptive Voltage Scaling Controller For Standard-Ceil ASICs. Proceedings 2002 Int'l Symposium on Low Power Electronics and Design (ISLPED-2002), August 2002.
2. D. Ernst, N. S. Kim, S. Das, S. Pant, R. Rao, T. Pham, C. Ziesler, D. Blaauw, T. Austin, T. Mudge, and K. Flautner. Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation. Proceedings of the 36th Symposium on Microarchitecture (MICRO-36), San Diego, CA, 2003.
3. K. Flautner and T. Mudge. Vertigo: Automatic Performance-Setting for Linux. Proceedings of the 5th Symposium on Operating Systems Design and Implementation (OSDI2002), Boston, MA, 2002.
4. N. S. Kim, T. Austin, D. Blaauw, T. Mudge, K. Flautner, J. S. Hu, M. J. Irwin, M. Kandemir, and V. Narayanan. Leakage Current: Moore's Law Meets Static Power. IEEE Computer, December 2003.
5. T. Mudge. Power: A First Class Architectural Design Constraint. IEEE Computer, vol. 34, no. 4, April 2001.
6. http://www.national.com/appinfo/power/powerwise.html