Application workload and SystemC platform modeling for performance evaluation

Lecture Notes in Electrical Engineering

Volumn 36 LNEE, Issue , 2009, Pages 131-147

  Kreku, Jari ^a   Hoppari, Mika ^b   Kestilä, Tuomo ^b   Qu, Yang ^b   Soininen, Juha Pekka ^b   Tiensyrjä, Kari ^b  

^a VTT TECHNICAL RESEARCH CENTRE OF FINLAND   (Finland)

^b NONE

Author keywords

Abstract instruction; Performance; Platform; Service modeling; Simulation; SystemC; Transaction level; UML2; Workload

Indexed keywords

ABSTRACT INSTRUCTION; PERFORMANCE; PLATFORM; SERVICE MODELING; SIMULATION; SYSTEMC; TRANSACTION-LEVEL; UML2; WORKLOAD;

ABSTRACTING; APPLICATION SPECIFIC INTEGRATED CIRCUITS; EMBEDDED SYSTEMS; LOGIC DESIGN; MICROPROCESSOR CHIPS; MOBILE DEVICES; VLSI CIRCUITS;

COMPUTER SIMULATION;

EID: 80051749371     PISSN: 18761100     EISSN: 18761119     Source Type: Book Series    
DOI: 10.1007/978-1-4020-9714-0_9     Document Type: Article

References (22)

1. K. Keutzer, A. Newton, J. Rabaey, and A. Sangiovanni-Vincentelli, System-level design: orthogonalization of concerns and platform-based design. IEEE Transactions on Computer- Aided Design of Integrated Circuits and Systems, 19(12):1523-1543, 2000. (Pubitemid 32870317)
2. MDA guide version 1.0.1, June 2003, document number: omg/2003-06-01. Available at http://www.omg.org/mda/.
3. F. Balarin, M. Chiodo, P. Giusto, H. Hsieh, A. Jurecska, L. Lavagno, C. Passerone, A. Sangiovanni-Vincentelli, E. Sentovich, K. Suzuki, and B. Tabbara. Hardware-Software Co- Design of Embedded Systems: The Polis Approach. Kluwer Academic, Dordrecht, 1997.
4. R. Suoranta, New directions in mobile device architectures. In The 9th Euromicro Conference on Digital System Design (DSD'06), 2006.
5. K. Kronlöf, S. Kontinen, I. Oliver, and T. Eriksson. A method for mobile terminal platform architecture development. In Advances in Design and Specification Languages for Embedded Systems, pages 285-300. Springer, Dordrecht, 2007.
6. C. Ykman-Couvreur, V. Nollet, T. Marescaux, E. Brockmeyer, F. Catthoor, and H. Corporaal, Design-time application mapping and platform exploration for MP-SoC customized run-time management. IET Comput. Digit. Tech., 1(2):120-128, 2007.
7. L. Papadopoulos, S.Mamagkakis, F. Catthoor, and D. Soudris. Application-specific NoC platform design based on system level optimization. In IEEE Computer Society Annual Symposium on VLSI (ISVLSI'07), 2007.
8. J. Xu, W. Wolf, J. Henkel, and S. Chakradhar. A design methodology for application-specific networks-on-chip. ACMTransactions on Embedded Computing Systems, 5(2):263-280, 2006.
9. G. Beltrame, D. Sciuto, C. Silvano, P. Paulin, and E. Bensoudane. An application mapping methodology and case study for multi-processor on-chip architectures. In 2006 IFIP International Conference on Very Large Scale Integration, pages 146-151, 16-18 October 2006.
10. P. Lieverse, P. van der Wolf, K. Vissers, and E. Deprettere. A methodology for architecture exploration of heterogeneous signal processing systems. VLSI Signal Processing, 29(3):197-207, 2001. (Pubitemid 33640824)
11. A. Pimentel and C. Erbas. A systematic approach to exploring embedded system architectures at multiple abstraction levels. IEEE Transactions on Computers, 55(2):99-112, 2006.
12. T. Wild, A. Herkersdorf, and G.-Y. Lee. TAPES-Trace-based architecture performance evaluation with SystemC. Design Automation for Embedded Systems, 10(2-3):157-179, 2006.
13. J.M. Paul, D.E. Thomas, and A.S. Cassidy. High-level modeling and simulation of single-chip programmable heterogeneous multiprocessors. ACM Transactions on Design Automation of Electronic Systems, 10(3):431-461, 2005. (Pubitemid 43906369)
14. Telelogic Tau 3.0 User Guide (December 2006). Telelogic AB, 1998 pp.
15. Open SystemC Initiative Website. http://www.systemc.org
16. J. Kreku, M. Hoppari, T. Kestilä et al. Combining UML2 application and SystemC platform modelling for performance evaluation of real-time embedded systems. EURASIP Journal on Embedded Systems, 2008(3), 2008. doi:10.1155/2008/712329
17. J. Kreku, Y. Qu, J.-P. Soininen, and K. Tiensyrjä. Layered UML workload and SystemC platform models for performance simulation. In Proceedings of Forum on Specification and Design Languages, pages 223-228. ECSI, Gières, 2006.
18. J. Kreku, T. Kauppi, and J.-P. Soininen. Evaluation of platform architecture performance using abstract instruction-level workload models. In International Symposium on System-on-Chip, pages 43-48, 2004. (Pubitemid 40893147)
19. J. Kreku, J. Penttilä, J. Kangas, and J.-P. Soininen.Workload simulation method for evaluation of application feasibility in a mobile multiprocessor platform. In The Euromicro Symposium on Digital System Design, pages 532-539, 2004. (Pubitemid 40266719)
20. J. Kreku, M. Eteläperä, and J.-P. Soininen. Exploitation of UML 2.0-based platform service model and SystemC workload simulation in MPEG-4 partitioning. In International Symposium on System-on-Chip, pages 167-170, 2005.
21. J. Kreku, M. Hoppari, K. Tiensyrjä, and P. Andersson. SystemC workload model generation from UML for performance simulation. In Proceedings of Forum on Specification and Design Languages. ECSI, Gières, 2007.
22. P. Andersson and M. Höst. UML and SystemC-comparison and mapping rules for automatic code generation. In Proceedings of Forum on Specification and Design Languages. ECSI, Gières, 2007.