A detailed failure analysis examination of the effect of thermal cycling on Cu TSV reliability

IEEE Transactions on Electron Devices

Volumn 61, Issue 1, 2014, Pages 15-22

  Okoro, Chukwudi ^a   Lau, June W ^a   Golshany, Fardad ^a   Hummler, Klaus ^b   Obeng, Yaw S ^a  

^a NATIONAL INSTITUTE OF STANDARDS AND TECHNOLOGY   (United States)

^b SEMATECH   (United States)

Author keywords

Failure analysis; finite element analysis; three dimensional integrated circuits; through silicon vias

Indexed keywords

CHAINS; ELECTRIC RESISTANCE; ELECTRONICS PACKAGING; FINITE ELEMENT METHOD; THERMAL CYCLING;

CYCLING CONDITIONS; ELECTRICAL MODELING; ELECTRICAL RESISTANCES; THERMALLY INDUCED; THERMOMECHANICAL MODEL; THREE DIMENSIONAL INTEGRATED CIRCUITS; THROUGH SILICON VIAS; THROUGH-SILICON VIA;

FAILURE ANALYSIS;

EID: 84891555948     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2013.2291297     Document Type: Article

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