Dynamic voltage and frequency scaling for shared resources in multicore processor designs

Proceedings - Design Automation Conference

Volumn , Issue , 2013, Pages

  Chen, Xi ^a   Xu, Zheng ^a   Kim, Hyungjun ^a   Gratz, Paul V ^a   Hu, Jiang ^a   Kishinevsky, Michael ^b   Ogras, Umit ^b   Ayoub, Raid ^b  

^a Texas AandM University   (United States)

^b INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DYNAMIC VOLTAGE AND FREQUENCY SCALING; DYNAMIC VOLTAGE/FREQUENCY SCALING; FULL-SYSTEM SIMULATION; LAST-LEVEL CACHES; MONITORING AND CONTROL; MULTICORE PROCESSOR DESIGNS; NETWORKS ON CHIPS; ON CHIP COMMUNICATION;

COMPUTER AIDED DESIGN;

MICROPROCESSOR CHIPS;

EID: 84879874685     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/2463209.2488874     Document Type: Conference Paper

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