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Volumn 60, Issue 1, 2013, Pages 213-218

Effects of neutron-induced well potential perturbation for multiple cell upset of flip-flops in 65 nm

Author keywords

Multiple cell upset (MCU); neutron irradiation; parasitic bipolar effect; sensor; soft error

Indexed keywords

AREA-EFFICIENT; BIPOLAR EFFECTS; BULK CMOS; CELL-BASED; DURATION TIME; MEASUREMENT RESULTS; MULTIPLE CELL UPSET; SINGLE EVENT UPSETS; SOFT ERROR; SPATIAL RESOLUTION; VOLTAGE LEVELS;

EID: 84873731753     PISSN: 00189499     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNS.2012.2229718     Document Type: Article
Times cited : (3)

References (16)
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  • 9
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    • DOI 10.1109/TNS.2005.860675
    • D. Radaelli, H. Puchner, S. Wong, and S. Daniel, "Investigation of multi-bit upsets in a 150 nm technology SRAM device," IEEE Trans. Nucl. Sci., vol. 52, no. 6, pp. 2433-2437, Dec. 2005. (Pubitemid 43269622)
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    • J. Furuta, R. Yamamoto, K. Kobayashi, and H. Onodera, "Correlations between well potential and SEUs measured by well-potential perturbation detectors in 65 nm," in Proc. Asian Solid-State Circuit Conf., Nov. 2011, pp. 209-212.
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.