A 0.6-V 800-MHz all-digital phase-locked loop with a digital supply regulator

IEEE Transactions on Circuits and Systems II: Express Briefs

Volumn 59, Issue 12, 2012, Pages 888-892

  Cheng, Kuo Hsing ^a   Liu, Jen Chieh ^b   Huang, Hong Yi ^c  

^a NATIONAL CENTRAL UNIVERSITY   (Taiwan)

^b INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE   (Taiwan)

^c NATIONAL TAIPEI UNIVERSITY   (Taiwan)

Author keywords

All digital PLL (ADPLL); digital controlled varactor (DCV); digital loop filter (DLF); digital supply regulator (DSR)

Indexed keywords

FREQUENCY CONVERTERS; VARACTORS;

ALL DIGITAL PHASE LOCKED LOOP; ALL-DIGITAL PLL; DIGITAL CONTROLLED VARACTOR (DCV); DIGITAL LOOP FILTERS; DIGITALLY CONTROLLED OSCILLATORS; DIGITALLY-CONTROLLED VARACTORS; SUPPLY REGULATORS; TIME TO DIGITAL CONVERTERS;

PHASE LOCKED LOOPS;

EID: 84873413313     PISSN: 15497747     EISSN: 15583791     Source Type: Journal    
DOI: 10.1109/TCSII.2012.2231021     Document Type: Article

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