Variation-resilient building blocks for ultra-low-energy sub-threshold design

IEEE Transactions on Circuits and Systems II: Express Briefs

Volumn 59, Issue 12, 2012, Pages 898-902

  Reynders, Nele ^a   Dehaene, Wim ^a,b  

^a UNIVERSITY OF LEUVEN   (Belgium)

^b IMEC   (Belgium)

Author keywords

CMOS digital integrated circuits; sub threshold logic; transmission gate logic; ultra low energy; variation resilience

Indexed keywords

CMOS INTEGRATED CIRCUITS; DIGITAL INTEGRATED CIRCUITS; LOW POWER ELECTRONICS; SENSITIVITY ANALYSIS; THRESHOLD VOLTAGE;

CIRCUIT TECHNIQUES; CMOS DIGITAL INTEGRATED CIRCUITS; LOW SUPPLY VOLTAGES; SUB-THRESHOLD DESIGN; SUB-THRESHOLD REGIONS; TRANSMISSION-GATE LOGIC; ULTRA LOW ENERGY; VARIATION RESILIENCE;

COMPUTER CIRCUITS;

EID: 84873404853     PISSN: 15497747     EISSN: 15583791     Source Type: Journal    
DOI: 10.1109/TCSII.2012.2231022     Document Type: Article

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