-
2
-
-
0014814325
-
Space/time trade-offs in hash coding with allowable errors
-
July
-
Burton H. Bloom. Space/time trade-offs in hash coding with allowable errors. Commun. ACM, 13:422-426, July 1970.
-
(1970)
Commun. ACM
, vol.13
, pp. 422-426
-
-
Bloom, B.H.1
-
3
-
-
84866693160
-
-
US Patent 5,799,200
-
William A. Brant, Michael E. Nielson, and Edde Tin-Shek Tang. Power failure responsive apparatus and method having a shadow dram, a flash rom, an auxiliary battery, and a controller. In US Patent 5,799,200, 1998.
-
(1998)
Power Failure Responsive Apparatus and Method Having a Shadow Dram, a Flash Rom, an Auxiliary Battery, and a Controller
-
-
Brant, W.A.1
Nielson, M.E.2
Tang, E.T.-S.3
-
4
-
-
84877689676
-
Energy-aware writes to non-volatile main memory
-
January
-
Jie Chen, R. C. Chiang, H. Howie Huang, and Guru Venkataramani. Energy-aware writes to non-volatile main memory. SIGOPS Oper. Syst. Rev., 45(3):48-52, January 2012.
-
(2012)
SIGOPS Oper. Syst. Rev.
, vol.45
, Issue.3
, pp. 48-52
-
-
Jie Chen, R.1
Chiang, C.2
Howie Huang, H.3
Venkataramani, G.4
-
5
-
-
84863039100
-
Huang, rpram: Exploring redundancy techniques to improve lifetime of pcm-based main memory
-
Jie Chen, Zachary Winter, Guru Venkataramani, and H Howie Huang, rpram: Exploring redundancy techniques to improve lifetime of pcm-based main memory. In Proceedings of the 2011 International Conference on Parallel Architectures and Compilation Techniques, 2011.
-
(2011)
Proceedings of the 2011 International Conference on Parallel Architectures and Compilation Techniques
-
-
Jie, C.1
Winter, Z.2
Venkataramani, G.3
Howie, H.4
-
6
-
-
76749099329
-
Flip-n-write: A simple deterministic technique to improve pram write performance, energy and endurance
-
Sangyeun Cho and Hyunjin Lee. Flip-n-write: a simple deterministic technique to improve pram write performance, energy and endurance. In MICRO, 2009.
-
(2009)
MICRO
-
-
Cho, S.1
Lee, H.2
-
7
-
-
81055156837
-
-
Intel Corporation. Intel core i7-920 processor. http://ark.intel.com/ Product.aspx?id=37147, 2010.
-
(2010)
Intel Core I7-920 Processor
-
-
-
9
-
-
77952268480
-
Dynamically replicated memory: Building reliable systems from nanoscale resistive memories
-
Engin Ipek, Jeremy Condit, Edmund B. Nightingale, Doug Burger, and Thomas Moscibroda. Dynamically replicated memory: building reliable systems from nanoscale resistive memories. In ASPLOS, 2010.
-
(2010)
ASPLOS
-
-
Ipek, E.1
Condit, J.2
Nightingale, E.B.3
Burger, D.4
Moscibroda, T.5
-
10
-
-
80051926375
-
Lls: Cooperative integration of wear-leveling and salvaging for pcm main memory
-
June
-
Lei Jiang, Yu Du, Youtao Zhang, B.R. Childers, and Jun Yang. Lls: Cooperative integration of wear-leveling and salvaging for pcm main memory. In DSN, pages 221-232, June 2011.
-
(2011)
DSN
, pp. 221-232
-
-
Lei, J.1
Du, Y.2
Zhang, Y.3
Childers, B.R.4
Jun, Y.5
-
11
-
-
47249126412
-
Raif: Redundant array of independent filesystems
-
Nikolai Joukov, Arun M. Krishnakumar, Chaitanya Patti, Abhishek Rai, Sunil Satnur, Avishay Traeger, and Erez Zadok. Raif: Redundant array of independent filesystems. MSST, 0:199-214, 2007.
-
(2007)
MSST
, pp. 199-214
-
-
Joukov, N.1
Krishnakumar, A.M.2
Patti, C.3
Rai, A.4
Satnur, S.5
Traeger, A.6
Zadok, E.7
-
12
-
-
79955602045
-
Raid: A personal recollection of how storage became a system
-
Randy H. Katz. Raid: A personal recollection of how storage became a system. Annals of the History of Computing, IEEE, 32(4), 2010.
-
(2010)
Annals of the History of Computing, IEEE
, vol.32
, Issue.4
-
-
Katz, R.H.1
-
13
-
-
84866654922
-
-
Cacti 5.3
-
HP Labs. Cacti 5.3. http://quid.hpl.hp.com:9081/cacti/, 2010.
-
(2010)
HP Labs
-
-
-
14
-
-
70450235471
-
Architecting phase change memory as a scalable dram alternative
-
Benjamin C. Lee, Engin Ipek, Onur Mutlu, and Doug Burger. Architecting phase change memory as a scalable dram alternative. In ISCA, 2009.
-
(2009)
ISCA
-
-
Lee, B.C.1
Ipek, E.2
Mutlu, O.3
Burger, D.4
-
17
-
-
84944041103
-
A case for redundant arrays of inexpensive disks (raid)
-
David A. Patterson, Garth Gibson, and Randy H. Katz. A case for redundant arrays of inexpensive disks (raid). In SIGMOD, pages 109-116, 1988.
-
(1988)
SIGMOD
, pp. 109-116
-
-
Patterson, D.A.1
Gibson, G.2
Katz, R.H.3
-
19
-
-
28444490333
-
Safemem: Exploiting ecc-memory for detecting memory leaks and memory corruption during production runs
-
Feng Qin, Shan Lu, and Yuanyuan Zhou. Safemem: Exploiting ecc-memory for detecting memory leaks and memory corruption during production runs. In HPCA, 2005.
-
(2005)
HPCA
-
-
Qin, F.1
Lu, S.2
Zhou, Y.3
-
20
-
-
76749167601
-
Enhancing lifetime and security of pcm-based main memory with start-gap wear leveling
-
Moinuddin K. Qureshi, John Karidis, Michele Franceschini, Vijayalakshmi Srinivasan, Luis Lastras, and Bulent Abali. Enhancing lifetime and security of pcm-based main memory with start-gap wear leveling. In MICRO, 2009.
-
(2009)
MICRO
-
-
Qureshi, M.K.1
Karidis, J.2
Franceschini, M.3
Srinivasan, V.4
Lastras, L.5
Abali, B.6
-
21
-
-
70450273507
-
Scalable high performance main memory system using phase-change memory technology
-
Moinuddin K. Qureshi, Vijayalakshmi Srinivasan, and Jude A. Rivers. Scalable high performance main memory system using phase-change memory technology. In ISCA, 2009.
-
(2009)
ISCA
-
-
Qureshi, M.K.1
Srinivasan, V.2
Rivers, J.A.3
-
22
-
-
55449106208
-
Phase-change random access memory: A scalable technology
-
July
-
S. Raoux, G. W Burr, M. J. Breitwisch, C. T. Rettner, Y.-C. Chen, R. M. Shelby, M. Salinga, D. Krebs, S.-H. Chen, H.-L. Lung, and C. H. Lam. Phase-change random access memory: a scalable technology. IBM J. Res. Dev., 52, July 2008.
-
(2008)
IBM J. Res. Dev.
, vol.52
-
-
Raoux, S.1
Burr, G.W.2
Breitwisch, M.J.3
Rettner, C.T.4
Chen, Y.-C.5
Shelby, R.M.6
Salinga, M.7
Krebs, D.8
Chen, S.-H.9
Lung, H.-L.10
Lam, C.H.11
-
23
-
-
84866681131
-
-
Jose Renau et al. SESC. http://sesc.sourceforge.net, 2006.
-
(2006)
-
-
Renau, J.1
-
24
-
-
77954982649
-
Use ecp, not ecc, for hard failures in resistive memories
-
Stuart Schechter, Gabriel H. Loh, Karin Straus, and Doug Burger. Use ecp, not ecc, for hard failures in resistive memories. In ISCA, 2010.
-
(2010)
ISCA
-
-
Schechter, S.1
Loh, G.H.2
Straus, K.3
Burger, D.4
-
26
-
-
79951719573
-
Safer: Stuck-at-fault error recovery for memories
-
Nak Hee Seong, Dong Hyuk Woo, Vijayalakshmi Srinivasan, Jude A. Rivers, and Hsien-Hsin S. Lee. Safer: Stuck-at-fault error recovery for memories. In MICRO, 2010.
-
(2010)
MICRO
-
-
Seong, N.H.1
Woo, D.H.2
Srinivasan, V.3
Rivers, J.A.4
Lee, H.-H.S.5
-
27
-
-
24644502365
-
-
Standard Performance Evaluation Corporation. SPEC Benchmarks. http://www.spec.org, 2006.
-
(2006)
SPEC Benchmarks
-
-
-
28
-
-
77954995377
-
Reducing cache power with low-cost, multi-bit error-correcting codes
-
Chris Wilkerson, Alaa R. Alameldeen, Zeshan Chishti, Wei Wu, Dinesh Somasekhar, and Shih-lien Lu. Reducing cache power with low-cost, multi-bit error-correcting codes. In ISCA, 2010.
-
(2010)
ISCA
-
-
Wilkerson, C.1
Alameldeen, A.R.2
Chishti, Z.3
Wu, W.4
Somasekhar, D.5
Lu, S.-L.6
-
29
-
-
0030085468
-
The hp autoraid hierarchical storage system
-
February
-
John Wilkes, Richard Golding, Carl Staelin, and Tim Sullivan. The hp autoraid hierarchical storage system. ACM Trans. Comput. Syst., 14, February 1996.
-
(1996)
ACM Trans. Comput. Syst.
, vol.14
-
-
Wilkes, J.1
Golding, R.2
Staelin, C.3
Sullivan, T.4
-
30
-
-
0029194459
-
The splash-2 programs: Characterization and methodological considerations
-
June
-
S.C. Woo, M. Ohara, E. Torrie, J.P. Singh, and A. Gupta. The splash-2 programs: Characterization and methodological considerations. In ISCA, June 1995.
-
(1995)
ISCA
-
-
Woo, S.C.1
Ohara, M.2
Torrie, E.3
Singh, J.P.4
Gupta, A.5
-
31
-
-
34548825142
-
A low power phase change random access memory using a data comparison write scheme
-
B. Yang, J. Lee, J. Kim, J. Cho, S. Lee, and B. Yu. A low power phase change random access memory using a data comparison write scheme. In ISCAS, 2007.
-
(2007)
ISCAS
-
-
Yang, B.1
Lee, J.2
Kim, J.3
Cho, J.4
Lee, S.5
Yu, B.6
-
32
-
-
79955923054
-
Free-p: Protecting non-volatile memory against both hard and soft errors
-
February
-
Doe Hyun Yoon, Naveen Muralimanohar, Jichuan Chang, Parthasarathy Ranganathan, Norman P. Jouppi, and Mattan Erez. Free-p: Protecting non-volatile memory against both hard and soft errors. In HPCA, February 2011.
-
(2011)
HPCA
-
-
Yoon, D.H.1
Muralimanohar, N.2
Chang, J.3
Ranganathan, P.4
Jouppi, N.P.5
Erez, M.6
-
33
-
-
76749137639
-
Characterizing and mitigating the impact of process variations on phase change based memory systems
-
Wangyuan Zhang and Tao Li. Characterizing and mitigating the impact of process variations on phase change based memory systems. In MICRO, 2009.
-
(2009)
MICRO
-
-
Zhang, W.1
Li, T.2
-
34
-
-
70450277571
-
A durable and energy efficient main memory using phase change memory technology
-
Ping Zhou, Bo Zhao, Jun Yang, and Youtao Zhang. A durable and energy efficient main memory using phase change memory technology. In ISCA, 2009.
-
(2009)
ISCA
-
-
Zhou, P.1
Bo, Z.2
Jun, Y.3
Zhang, Y.4
|