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Volumn , Issue , 2012, Pages 297-302

MultiScale: Memory system DVFS with multiple memory controllers

Author keywords

dynamic voltage and frequency scaling; energy conservation; memory system

Indexed keywords

BANDWIDTH REQUIREMENT; DYNAMIC FREQUENCY; DYNAMIC VOLTAGE AND FREQUENCY SCALING; MEMORY CHANNELS; MEMORY CONTROLLER; MEMORY SYSTEMS; MULTI CORE; MULTISCALES; PERFORMANCE CONSTRAINTS; PERFORMANCE DEGRADATION; SERVER PROCESSORS; SYSTEM ENERGY; VOLTAGE-SCALING;

EID: 84865558350     PISSN: 15334678     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/2333660.2333727     Document Type: Conference Paper
Times cited : (59)

References (33)
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  • 3
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    • Fine-grained Activation for Power Reduction in DRAM
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    • (2010) IEEE Micro
    • Cooper-Balis, E.1    Jacob, B.2
  • 12
    • 0034875742 scopus 로고    scopus 로고
    • Memory Controller Policies for DRAM Power Management
    • X. Fan, C. Ellis, and A. Lebeck. Memory Controller Policies for DRAM Power Management. In ISLPED, 2001.
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    • Fan, X.1    Ellis, C.2    Lebeck, A.3
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    • Huang, H.1    Shin, K.2    Lefurgy, C.3    Keller, T.4
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    • Li, S.1    Ahn, J.2    Strong, R.3    Brockman, J.4    Tullsen, D.5    Jouppi, N.6
  • 25
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    • Reducing Memory Interference in Multicore Systems Via Application-Aware Memory Channel Partitioning
    • S. P. Muralidhara, L. Subramanian, O. Mutlu, M. Kandemir, and T. Moscibroda. Reducing Memory Interference in Multicore Systems Via Application-Aware Memory Channel Partitioning. In MICRO, 2011.
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    • Muralidhara, S.P.1    Subramanian, L.2    Mutlu, O.3    Kandemir, M.4    Moscibroda, T.5
  • 33
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    • Mini-Rank: Adaptive DRAM Architecture for Improving Memory Power Efficiency
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    • Zheng, H.1    Lin, J.2    Zhang, Z.3    Gorbatov, E.4    David, H.5    Zhu, Z.6


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.