Memory controller policies for DRAM power management

Proceedings of the International Symposium on Low Power Electronics and Design, Digest of Technical Papers

Volumn , Issue , 2001, Pages 129-134

  Fan, X ^a   Ellis, C S ^a   Lebeck, A R ^a  

^a Duke University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BENCHMARKING; CACHE MEMORY; COMPUTER SIMULATION; CONTROL EQUIPMENT; DATA STORAGE EQUIPMENT; ELECTRIC POWER MEASUREMENT; ENERGY GAP; ENERGY UTILIZATION; MICROPROCESSOR CHIPS; THRESHOLD ELEMENTS;

MEMORY CONTROLLER POLICIES;

DYNAMIC RANDOM ACCESS STORAGE;

EID: 0034875742     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/383082.383118     Document Type: Conference Paper

References (8)

1. DRAM energy management using software and hardware directed power mode control
2. Energy dissipation in general purpose microprocessors
3. Power aware page allocation
4. Execution characteristics of desktop applications on Windows NT