Room temperature fabrication of p-channel Cu 2O thin-film transistors on flexible polyethylene terephthalate substrates

Applied Physics Letters

Volumn 101, Issue 4, 2012, Pages

  Yao, Z Q ^a   Liu, S L ^b   Zhang, L ^c   He, B ^d   Kumar, A ^c   Jiang, X ^c   Zhang, W J ^d   Shao, G ^e  

^a ZHENGZHOU UNIVERSITY   (China)

^b SICHUAN UNIVERSITY   (China)

^c UNIVERSITY OF SIEGEN   (Germany)

^d CITY UNIVERSITY OF HONG KONG   (Hong Kong)

^e UNIVERSITY OF BOLTON   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

BOTTOM GATE; ELECTRICAL PERFORMANCE; ELECTRICAL TRANSPORT PROPERTIES; FIELD-EFFECT MOBILITIES; HIGH-THROUGHPUT; LOW PROCESSING TEMPERATURE; LOW-COST ELECTRONICS; MICROSTRUCTURE EVOLUTIONS; NANOCRYSTALLINE CU; ON/OFF RATIO; P-TYPE; POST ANNEALING; ROOM TEMPERATURE; SEMI-CONDUCTING PROPERTY; THIN-FILM TRANSISTOR (TFTS); TOP CONTACT; TRANSFER PERFORMANCE;

ELECTRIC PROPERTIES; POLYETHYLENE TEREPHTHALATES; SEMICONDUCTING FILMS; THIN FILM TRANSISTORS; TRANSPORT PROPERTIES;

COPPER;

EID: 84864425596     PISSN: 00036951     EISSN: None     Source Type: Journal    
DOI: 10.1063/1.4739524     Document Type: Article

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