Fabrication of flexible and vertical silicon nanowire electronics

Nano Letters

Volumn 12, Issue 6, 2012, Pages 3339-3343

  Weisse, Jeffrey M ^a   Lee, Chi Hwan ^a   Kim, Dong Rip ^a   Zheng, Xiaolin ^a  

^a Stanford University   (United States)

Author keywords

flexible nanowire devices; nanowire array devices; PDMS etching; porous silicon; Vertical nanowire transfer

Indexed keywords

ELECTRICAL CHARACTERIZATION; ELECTROLESS; METALLIC CONTACTS; NANOMATERIAL; NANOWIRE ARRAYS; NANOWIRE DEVICES; SI WAFER; SILICON NANOWIRES; VERTICAL NANOWIRE TRANSFER;

CURRENT VOLTAGE CHARACTERISTICS; FABRICATION; FLEXIBLE ELECTRONICS; NANOWIRES; PLASTICS APPLICATIONS; POROUS SILICON; SILICON; SUBSTRATES;

SILICON WAFERS;

NANOTUBE; SILICON;

ARTICLE; CHEMISTRY; CONFORMATION; CRYSTALLIZATION; ELASTICITY; ELECTRIC CONDUCTIVITY; ELECTRONICS; INSTRUMENTATION; MACROMOLECULE; MATERIALS TESTING; METHODOLOGY; PARTICLE SIZE; SURFACE PROPERTY; ULTRASTRUCTURE;

CRYSTALLIZATION; ELASTICITY; ELECTRIC CONDUCTIVITY; ELECTRONICS; MACROMOLECULAR SUBSTANCES; MATERIALS TESTING; MOLECULAR CONFORMATION; NANOTUBES; PARTICLE SIZE; SILICON; SURFACE PROPERTIES;

EID: 84862281022     PISSN: 15306984     EISSN: 15306992     Source Type: Journal    
DOI: 10.1021/nl301659m     Document Type: Article

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