Effect of threshold-voltage instability on SiC power MOSFET high-temperature reliability

ECS Transactions

Volumn 41, Issue 8, 2011, Pages 203-214

  Lelis, A ^a   Green, R ^a   Habersat, D ^a  

^a U S ARMY RESEARCH LABORATORY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BIAS VOLTAGE; DEFECTS; GALLIUM NITRIDE; III-V SEMICONDUCTORS; NITRIDES; SILICON CARBIDE; STABILITY; THRESHOLD VOLTAGE;

DEVICE FAILURES; ELEVATED TEMPERATURE; HIGH TEMPERATURE; HIGH-TEMPERATURE BIAS; ON STATE CURRENT; PRECURSOR OXIDES; PROCESSING METHOD; THRESHOLD-VOLTAGE INSTABILITIES;

POWER MOSFET;

EID: 84857297459     PISSN: 19385862     EISSN: 19386737     Source Type: Conference Proceeding    
DOI: 10.1149/1.3631498     Document Type: Conference Paper

References (26)

1. T.E. Salem, D. P. Urciuoli, R. Green, and G. K. Ovrebo, "High-Temperature High-Power Operation of a 100 A SiC DMOSFET Module," in Proc. 2009 IEEE Applied Power Electronics Conf., p. 653-657 (2009).
2. R.A. Wood and T.E. Salem, "Characteristics of a 1200 V, 550 A SiC DMOSFET Dual Module," presented at 2010 PCIM (Power Electronics/Intelligent Motion/Power Quality) Nuremberg, Germany (2010).
3. D. Urciuoli, R. Green, A. Lelis, and D. Ibitayo, "Performance of a Dual, 1200 V, 400 A, Silicon-Carbide Power MOSFET Module," Proc. of 2010 ECCE (2010).
4. J. Scofield, N. Merrett, J. Richmond, A. Agarwal, and S. Leslie, "Electrical and Thermal Performance of 1200 V, 100 A, 200°C 4H-SiC MOSFET based Power Switch Modules," Mat. Sci. Forum, 645-648, p. 1119 (2010).
5. S.-H. Ryu, B. Hull, S. Dhar, L. Cheng, Q. Zhang, J. Richmond, M. Das, A. Agarwal, J. Palmour, A. Lelis, B. Geil, and C. Scozzie: Mater. Sci. Forum Vol. 645-648 (2010), p. 969.
6. K. Matocha, P. Losee, A. Gowda, E. Delgado, G. Dunne, R. Beaupre, and L. Stevanovic: Mater. Sci. Forum Vol. 645-648 (2010), p. 979.
7. A.J. Lelis, R. Green, and D. Habersat, "High-Temperature Reliability of SiC Power MOSFETs," Mater. Sci. Forum, 679-680, p. 599 (2011).
8. A.J. Lelis, D. Habersat, R. Green, A. Ogunniyi, M. Gurfinkel, J. Suehle, and N. Goldsman: IEEE Trans. Elec. Dev., Vol. 55, No. 8, (2008), p. 1835.
9. M. J. Tadjer, K. D. Hobart, E. Imhoff, and F. J. Kub, "Temperature and Time Dependent Threshold Voltage Instability in 4H-SiC Power DMOSFET Devices," Mater. Sci. Forum, 600-603, p. 1147 (2009).
10. M. Grieb, M. Noborio, D. Peters, A. J. Bauer, P. Friedrichs, T. Kimoto, and H. Ryssel, "Comparison of the threshold-voltage stability of SiC MOSFETs with thermally grown and deposited gate oxides," Mater. Sci. Forum, 645-648, p. 681 (2010).
11. H. Yano, Y. Oshiro, D. Okamoto, T. Hatayama, and T. Fuyuki, "Instability of 4H-SiC MOSFET Characteristics due to Interface Traps with Long Time Constants," Mater. Sci. Forum, 679-680, p. 603 (2011).
12. M. Gurfinkel, H.D. Xiong, K.P. Cheung, J.S. Suehle, J.B. Bernstein, Y. Shapira, A.J. Lelis, D. Habersat, and N. Goldsman, "Characterization of Transient Gate Oxide Trapping in SiC MOSFETs Using Fast I-V Techniques," IEEE Trans. Elec. Dev., 55:8, p. 2004 (2008).
13. S. Potbhare, N. Goldsman, A. Lelis, J.M. McGarrity, F.B. McLean, and D. Habersat, "A Physical Model of High Temperature 4H-SiC MOSFETs," IEEE Trans. Elec. Dev., 55:8, p. 2029 (2008).
14. A. Agarwal and S. Haney, "Some Critical Materials and Processing Issues in SiC Power Devices," J. Elec. Mater., 37:5, p. 646 (2008).
15. A.J. Lelis, R. Green, D. Habersat, and N. Goldsman, "Effect of Threshold-Voltage Instability on SiC DMOSFET Reliability," IEEE IIRW Final Report, p. 72 (2008).
16. A. Lelis, D. Habersat, R. Green, and N. Goldsman, "Implications of Threshold-Voltage Instability on SiC DMOSFET Operation," Mater. Sci. Forum, 615-617, p. 809 (2009).
17. A. Lelis, R. Green, D. Habersat, and N. Goldsman, "Effect of ON-state Stress on SiC DMOSFET Subthreshold I-V Characteristics," Mater. Sci. Forum, 645-648, p. 983 (2010).
18. A.J. Lelis, R. Green, and D. Habersat, "High-Temperature Reliability of SiC Power MOSFETs," Mater. Sci. Forum, 679-680, p. 599 (2011).
19. C.J. Scozzie and J.M. McGarrity, "Charge Pumping Measurements on SiC MOSFETs," Mater. Sci. Forum, 264-268, p. 985 (1998).
20. A. Lelis, D. Habersat, R. Green, and N. Goldsman,"Temperature- Dependence of SiC MOSFET Thershold-Voitage Instability," Mater. Sci. Forum, vols. 600-603, p. 807 (2009).
21. A.J. Lelis, "Cause and Effect of Threshold-Voltage Instability on the Reliability of Silicon-Carbide MOSFETs," Ph.D. dissertation, University of Maryland, College Park, MD (2011).
22. C. J. Cochrane, P. M. Lenahan, and A. J. Lelis, "An electrically detected magnetic resonance study of performance limiting defects in SiC metal oxide semiconductor field effect transistors," J. Appl. Phys., 109, 014506 (2011).
23. T. R. Oldham, A. J. Lelis, and F. B. McLean, "Spatial dependence of trapped holes determined from tunneling analysis and measured annealing," IEEE Trans. Nucl. Sci., 33:6, p. 1203 (1986).
24. A.J. Lelis, T.R. Oldham, H.E. Boesch, Jr., and F.B. McLean, "The Nature of the Trapped Hole Annealing Process," IEEE Trans. Nucl. Sci., vol. 36:6, p. 1808 (1989).
25. J.T. Ryan, P.M. Lenahan, T. Grasser, and H. Enichlmair, "Observations of negative bias temperature instability defect generation via on the fly electron spin resonance," Appl. Phys. Lett., 96, 223509 (2010).
26. R. Green, A. Lelis, and D. Habersat, "Application of Reliability Test Standards to SiC Power MOSFETs," presented at 2011 Intl. Rel. Physics Symposium (April 2011).