Application of graphene and carbon nanotubes to transistors and interconnects

ECS Transactions

Volumn 37, Issue 1, 2011, Pages 121-132

  Sato, Shintaro ^a,b,c   Hayashi, Kenjiro ^a,c   Yagi, Katsunori ^a   Kondo, Daiyu ^a,c   Yamada, Ayaka ^a,c   Harada, Naoki ^a,c   Nihei, Mizuhisa ^a,b,c   Yokoyama, Naoki ^a,c  

^a NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY AIST   (Japan)

^b SEMICONDUCTOR LEADING EDGE TECHNOLOGIES INC   (Japan)

^c FUJITSU LABORATORIES LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CARBON NANOTUBES; CHEMICAL VAPOR DEPOSITION; GRAPHENE; GRAPHENE TRANSISTORS; INTEGRATED CIRCUIT INTERCONNECTS; LOW POWER ELECTRONICS; SEMICONDUCTOR DEVICE MANUFACTURE; SILICON WAFERS; THIN FILM TRANSISTORS; THIN FILMS; ULSI CIRCUITS;

CHEMICAL VAPOR DEPOSITIONS (CVD); FABRICATION PROCESS; INTERCONNECT MATERIALS; LARGE SCALE INTEGRATED CIRCUIT; LOW-POWER CONSUMPTION; NANO-CARBON MATERIAL; NUCLEATION BEHAVIOR; TRANSISTOR CHANNELS;

THIN FILM CIRCUITS;

EID: 84856859260     PISSN: 19385862     EISSN: 19386737     Source Type: Conference Proceeding    
DOI: 10.1149/1.3600732     Document Type: Conference Paper

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