Characterization of thermal stresses in through-silicon vias for three-dimensional interconnects by bending beam technique

Applied Physics Letters

Volumn 100, Issue 4, 2012, Pages

  Ryu, Suk Kyu ^a   Jiang, Tengfei ^a   Lu, Kuan H ^a   Im, Jay ^a   Son, Ho Young ^b   Byun, Kwang Yoo ^b   Huang, Rui ^a   Ho, Paul S ^a  

^a The University of Texas at Austin   (United States)

^b Hynix Semiconductor Inc   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

3D TECHNOLOGY; BENDING BEAM; CRITICAL ELEMENTS; CURVATURE MEASUREMENT; ELECTRICAL RELIABILITY; ELECTRON BACKSCATTERING DIFFRACTION; EXPERIMENTAL TECHNIQUES; FIRST CYCLE; LOCALIZED PLASTICITY; STACK STRUCTURE; THERMALLY INDUCED STRESS; THREE DIMENSIONAL (3D) INTEGRATION; THROUGH SILICON VIAS;

BACKSCATTERING; BENDING MACHINES; ELECTRONICS PACKAGING; FINITE ELEMENT METHOD; STRESS CONCENTRATION; THERMAL STRESS; THREE DIMENSIONAL;

GRAIN GROWTH;

EID: 84856494543     PISSN: 00036951     EISSN: None     Source Type: Journal    
DOI: 10.1063/1.3678020     Document Type: Article

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