Interface engineering with an MOCVD grown ZnO interface passivation layer for ZrO2GaAs metaloxidesemiconductor devices

Solid State Communications

Volumn 151, Issue 24, 2011, Pages 1881-1884

  Kundu, Souvik ^a   Shripathi, T ^b   Banerji, P ^a  

^a INDIAN INSTITUTE OF TECHNOLOGY   (India)

^b UGC DAE CONSORTIUM FOR SCIENTIFIC RESEARCH   (India)

Author keywords

A. GaAs; B. Interface passivation layer; C. Metaloxidesemiconductor; D. Frequency dispersion

Indexed keywords

B. INTERFACE PASSIVATION LAYER; C. METALOXIDESEMICONDUCTOR; CAPACITANCE VOLTAGE; CONSTANT VOLTAGE; DIELECTRIC RELIABILITY; FERMI LEVEL PINNING; FREQUENCY DISPERSION; GAAS; GATE STACKS; GATE-LEAKAGE CURRENT; INTERFACE ENGINEERING; INTERFACE PASSIVATION; INTERFACE QUALITY; INTERFACE TRAP DENSITY; ULTRA-THIN; ULTRATHIN LAYERS; ZNO;

FERMI LEVEL; GALLIUM ALLOYS; GALLIUM ARSENIDE; HIGH RESOLUTION ELECTRON MICROSCOPY; HIGH RESOLUTION TRANSMISSION ELECTRON MICROSCOPY; LEAKAGE CURRENTS; METALLORGANIC CHEMICAL VAPOR DEPOSITION; MOS DEVICES; ORGANIC CHEMICALS; ORGANOMETALLICS; PASSIVATION; PHOTOELECTRON SPECTROSCOPY; TRANSMISSION ELECTRON MICROSCOPY; X RAY PHOTOELECTRON SPECTROSCOPY; ZINC OXIDE; ZIRCONIUM ALLOYS;

SEMICONDUCTING GALLIUM;

EID: 80655123169     PISSN: 00381098     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.ssc.2011.09.033     Document Type: Article

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