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Volumn , Issue , 2011, Pages 243-252

Real-time communication analysis for networks with two-stage arbitration

Author keywords

[No Author keywords available]

Indexed keywords

ANALYSIS SOLUTION; CURRENT ANALYSIS; INDIVIDUAL TRAFFIC; MULTI-STAGE; NONSYMMETRIC; ON CHIPS; REAL-TIME COMMUNICATION; SCHEDULABILITY ANALYSIS; SCHEDULING ANALYSIS; SHARED RESOURCES; TWO STAGE;

EID: 80455129094     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/2038642.2038680     Document Type: Conference Paper
Times cited : (14)

References (34)
  • 2
    • 1242309790 scopus 로고    scopus 로고
    • QNoC: QoS architecture and design process for network on chip
    • E. Bolotin, I. Cidon, R. Ginosar, and A. Kolodny. QNoC: QoS Architecture and Design Process for Network on Chip. J. Syst. Archit., 50(2-3):105-128, 2004.
    • (2004) J. Syst. Archit. , vol.50 , Issue.2-3 , pp. 105-128
    • Bolotin, E.1    Cidon, I.2    Ginosar, R.3    Kolodny, A.4
  • 4
    • 77955107429 scopus 로고    scopus 로고
    • Back suction: Service guarantees for latency-sensitive on-chip networks
    • J. Diemer and R. Ernst. Back Suction: Service Guarantees for Latency-Sensitive On-Chip Networks. In NOCS, 2010.
    • (2010) NOCS
    • Diemer, J.1    Ernst, R.2
  • 5
    • 43949160401 scopus 로고
    • A comprehensive analytical model for wormhole routing in multicomputer systems
    • J. Draper and J. Ghosh. A comprehensive analytical model for wormhole routing in multicomputer systems. Journal of Parallel and Distributed Computing, 23(2):202-214, 1994.
    • (1994) Journal of Parallel and Distributed Computing , vol.23 , Issue.2 , pp. 202-214
    • Draper, J.1    Ghosh, J.2
  • 6
    • 34547217982 scopus 로고    scopus 로고
    • Bounded arbitration algorithm for qos-supported on-chip communication
    • M. A. A. Faruque, G. Weiss, and J. Henkel. Bounded Arbitration Algorithm for QoS-Supported On-chip Communication. In CODES+ISSS'06, 2006.
    • (2006) CODES+ISSS'06
    • Faruque, M.A.A.1    Weiss, G.2    Henkel, J.3
  • 7
    • 27344456043 scopus 로고    scopus 로고
    • Æthereal network on chip: Concepts, architectures, and implementations
    • DOI 10.1109/MDT.2005.99
    • K. Goossens, J. Dielissen, and A. Rǎdulescu. æthereal Network on Chip: Concepts, Architectures, and Implementations. IEEE DESIGN & TEST, 22(5):414-421, 2005. (Pubitemid 41522729)
    • (2005) IEEE Design and Test of Computers , vol.22 , Issue.5 , pp. 414-421
    • Goossens, K.1    Dielissen, J.2    Radulescu, A.3
  • 8
    • 33749594229 scopus 로고    scopus 로고
    • Switch scheduling and network design for real-time systems
    • S. Gopalakrishnan, M. Caccamo, and L. Sha. Switch scheduling and network design for real-time systems. In RTAS'06, 2006.
    • (2006) RTAS'06
    • Gopalakrishnan, S.1    Caccamo, M.2    Sha, L.3
  • 9
    • 27644490224 scopus 로고    scopus 로고
    • A unified approach to constrained mapping and routing on network-on-chip architectures
    • ACM New York, NY, USA
    • A. Hansson, K. Goossens, and A. Rǎdulescu. A unified approach to constrained mapping and routing on network-on-chip architectures. In CODES+ISSS'05. ACM New York, NY, USA, 2005.
    • (2005) CODES+ISSS'05
    • Hansson, A.1    Goossens, K.2    Rǎdulescu, A.3
  • 10
  • 11
    • 38349147091 scopus 로고    scopus 로고
    • An analytical model for wormhole routing with finite size input buffers
    • P. Hu and L. Kleinrock. An analytical model for wormhole routing with finite size input buffers. In ITC-15, 1997.
    • (1997) ITC-15
    • Hu, P.1    Kleinrock, L.2
  • 13
    • 78649874524 scopus 로고    scopus 로고
    • NoC switch with credit based guaranteed service support qualified for GALS systems
    • CPS
    • T. Kranich and M. Berekovic. NoC switch with credit based guaranteed service support qualified for GALS systems. In DSD'10. CPS, 2010.
    • (2010) DSD'10
    • Kranich, T.1    Berekovic, M.2
  • 15
    • 52649094492 scopus 로고    scopus 로고
    • Globally-synchronized frames for guaranteed quality-of-service in on-chip networks
    • J. Lee, M. C. Ng, and K. Asanovic. Globally-Synchronized Frames for Guaranteed Quality-of-Service in On-Chip Networks. In ISCA'08, 2008.
    • (2008) ISCA'08
    • Lee, J.1    Ng, M.C.2    Asanovic, K.3
  • 16
    • 0037842938 scopus 로고    scopus 로고
    • Real-time wormhole channels
    • DOI 10.1016/S0743-7315(02)00055-2
    • S. Lee. Real-time wormhole channels. Journal of Parallel and Distributed Computing, 63(3):299-311, 2003. (Pubitemid 36668277)
    • (2003) Journal of Parallel and Distributed Computing , vol.63 , Issue.3 , pp. 299-311
    • Lee, S.1
  • 17
    • 84880911285 scopus 로고
    • Fixed priority scheduling of periodic task sets with arbitrary deadlines
    • J. Lehoczky. Fixed priority scheduling of periodic task sets with arbitrary deadlines. In RTSS'90, 1990.
    • (1990) RTSS'90
    • Lehoczky, J.1
  • 20
    • 0032655137 scopus 로고    scopus 로고
    • The iSLIP scheduling algorithm for input-queued switches
    • N. McKeown. The iSLIP scheduling algorithm for input-queued switches. IEEE/ACM Transactions on Networking (TON), 7(2):188-201, 1999.
    • (1999) IEEE/ACM Transactions on Networking (TON) , vol.7 , Issue.2 , pp. 188-201
    • Mckeown, N.1
  • 21
    • 3042740415 scopus 로고    scopus 로고
    • Guaranteed bandwidth using looped containers in temporally disjoint networks within the nostrum network on chip
    • M. Millberg, E. Nilsson, R. Thid, and A. Jantsch. Guaranteed Bandwidth using Looped Containers in Temporally Disjoint Networks within the Nostrum Network on Chip. In DATE'04, 2004.
    • (2004) DATE'04
    • Millberg, M.1    Nilsson, E.2    Thid, R.3    Jantsch, A.4
  • 22
    • 70350060182 scopus 로고    scopus 로고
    • Response-time analysis of arbitrarily activated tasks in multiprocessor systems with shared resources
    • M. Negrean, S. Schliecker, and R. Ernst. Response-time analysis of arbitrarily activated tasks in multiprocessor systems with shared resources. In DATE'09, 2009.
    • (2009) DATE'09
    • Negrean, M.1    Schliecker, S.2    Ernst, R.3
  • 23
    • 34548304654 scopus 로고    scopus 로고
    • Analytical router modeling for networks-on-chip performance analysis
    • U. Ogras and R. Marculescu. Analytical router modeling for networks-on-chip performance analysis. In DATE'07, 2007.
    • (2007) DATE'07
    • Ogras, U.1    Marculescu, R.2
  • 24
    • 38849134743 scopus 로고    scopus 로고
    • Improved response time analysis of tasks scheduled under preemptive round-robin
    • R. Racu, L. Li, R. Henia, A. Hamann, and R. Ernst. Improved response time analysis of tasks scheduled under preemptive round-robin. In CODES+ISSS'07, 2007.
    • (2007) CODES+ISSS'07
    • Racu, R.1    Li, L.2    Henia, R.3    Hamann, A.4    Ernst, R.5
  • 26
    • 72149101565 scopus 로고    scopus 로고
    • A recursive approach to end-to-end path latency computation in heterogeneous multiprocessor systems
    • ACM
    • S. Schliecker and R. Ernst. A Recursive Approach to End-To-End Path Latency Computation in Heterogeneous Multiprocessor Systems. In CODES-ISSS'09. ACM, 2009.
    • (2009) CODES-ISSS'09
    • Schliecker, S.1    Ernst, R.2
  • 28
    • 63349086729 scopus 로고    scopus 로고
    • Providing accurate event models for the analysis of heterogeneous multiprocessor systems
    • S. Schliecker, J. Rox, M. Ivers, and R. Ernst. Providing Accurate Event Models for the Analysis of Heterogeneous Multiprocessor Systems. In CODES-ISSS'08, 2008.
    • (2008) CODES-ISSS'08
    • Schliecker, S.1    Rox, J.2    Ivers, M.3    Ernst, R.4
  • 29
    • 44149099590 scopus 로고    scopus 로고
    • Real-time communication analysis for on-chip networks with wormhole switching
    • Z. Shi and A. Burns. Real-time communication analysis for on-chip networks with wormhole switching. In NOCS, 2008.
    • (2008) NOCS
    • Shi, Z.1    Burns, A.2
  • 31
    • 0033682521 scopus 로고    scopus 로고
    • Real-time calculus for scheduling hard real-time systems
    • IEEE
    • L. Thiele, S. Chakraborty, and M. Naedele. Real-time calculus for scheduling hard real-time systems. In ISCAS'00, volume 4. IEEE, 2000.
    • (2000) ISCAS'00 , vol.4
    • Thiele, L.1    Chakraborty, S.2    Naedele, M.3
  • 32
    • 0028396945 scopus 로고
    • An extendible approach for analyzing fixed priority hard real-time tasks
    • K. Tindell, A. Burns, and A. Wellings. An extendible approach for analyzing fixed priority hard real-time tasks. Real-Time Systems, 6(2):133-151, 1994.
    • (1994) Real-Time Systems , vol.6 , Issue.2 , pp. 133-151
    • Tindell, K.1    Burns, A.2    Wellings, A.3
  • 33
    • 0028418313 scopus 로고
    • Holistic schedulability analysis for distributed hard real-time systems
    • K. Tindell and J. Clark. Holistic schedulability analysis for distributed hard real-time systems. Microprocessing and microprogramming, 40(2-3):117-134, 1994.
    • (1994) Microprocessing and Microprogramming , vol.40 , Issue.2-3 , pp. 117-134
    • Tindell, K.1    Clark, J.2
  • 34
    • 51249116708 scopus 로고    scopus 로고
    • A switch design for real-time industrial networks
    • Citeseer
    • Q. Wang, S. Gopalakrishnan, X. Liu, and L. Sha. A Switch Design for Real-Time Industrial Networks. In RTAS'08. Citeseer, 2008.
    • (2008) RTAS'08
    • Wang, Q.1    Gopalakrishnan, S.2    Liu, X.3    Sha, L.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.