Analytical router modeling for networks-on-chip performance analysis

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2007, Pages 1096-1101

  Ogras, Umit Y ^a   Marculescu, Radu ^a  

^a CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; MATHEMATICAL MODELS; MICROPROCESSOR CHIPS; NETWORK ARCHITECTURE; OPTIMIZATION; PARAMETER ESTIMATION;

NETWORKS-ON-CHIP (NOC); OPTIMIZATION LOOPS; PERFORMANCE ESTIMATES;

ROUTERS;

EID: 34548304654     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2007.364440     Document Type: Conference Paper

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