Placement and floorplanning in dynamically reconfigurable FPGAs

ACM Transactions on Reconfigurable Technology and Systems

Volumn 3, Issue 4, 2010, Pages

  Montone, Alessio ^a   Santambrogio, Marco D ^b   Sciuto, Donatella ^a   Memik, Seda Ogrenci ^c  

^a POLITECNICO DI MILANO   (Italy)

^b MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

^c Northwestern University   (United States)

Author keywords

Computeraided design; Floorplacement; FPGAs; Reconfigurable computing

Indexed keywords

COMMUNICATION INFRASTRUCTURE; COMPLETE PARTITIONING; FLOOR-PLANNING; FLOORPLACEMENT; FPGA DEVICES; PHYSICAL CONSTRAINTS; RECONFIGURABLE COMPUTING; RECONFIGURABLE SYSTEMS; RESOURCE DISTRIBUTION; RESOURCE HETEROGENEITY; TEMPORAL DIMENSIONS;

ALGORITHMS; RECONFIGURABLE ARCHITECTURES; RECONFIGURABLE HARDWARE; STRUCTURAL DESIGN;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 80455122876     PISSN: 19367406     EISSN: 19367414     Source Type: Journal    
DOI: 10.1145/1862648.1862654     Document Type: Article

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