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Volumn 240, Issue , 2007, Pages 87-109

Caronte: A methodology for the implementation of partially dynamically self-reconfiguring systems on FPGA platforms

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMPUTER OPERATING SYSTEMS; DYNAMIC MODELS; LINUX; MICROPROCESSOR CHIPS; OPEN SOURCE SOFTWARE; PROGRAMMABLE LOGIC CONTROLLERS; REAL TIME SYSTEMS; RECONFIGURABLE HARDWARE; SPECIFICATIONS;

EID: 34548776547     PISSN: 15715736     EISSN: None     Source Type: Book Series    
DOI: 10.1007/978-0-387-73661-7_7     Document Type: Conference Paper
Times cited : (4)

References (23)
  • 1
    • 34548714963 scopus 로고    scopus 로고
    • Dynamic Reconfiguration of RocketIO MGT Attributes
    • Technical Report XAPP660, Xilinx Inc, February
    • Derek R. Curd. Dynamic Reconfiguration of RocketIO MGT Attributes. Technical Report XAPP660, Xilinx Inc., February 2004.
    • (2004)
    • Curd, D.R.1
  • 2
    • 34548780538 scopus 로고    scopus 로고
    • In-Circuit Partial Reconfiguration of RocketIO Attributes
    • Technical Report XAPP662, Xilinx Inc, January
    • Vince Ech, Punit Kalra, Rick LeBlanc, and Jim McManus. In-Circuit Partial Reconfiguration of RocketIO Attributes. Technical Report XAPP662, Xilinx Inc., January 2003.
    • (2003)
    • Ech, V.1    Kalra, P.2    LeBlanc, R.3    McManus, J.4
  • 7
    • 34548716120 scopus 로고    scopus 로고
    • Arcturus Networks Inc. μclinux, Embedded Linux/Microcontroller Project. In www.uclinux.org.
    • Arcturus Networks Inc. μclinux, Embedded Linux/Microcontroller Project. In www.uclinux.org.
  • 9
    • 34548726523 scopus 로고
    • A splash 2 tutorial. technical report src-tr-92-087
    • December
    • D. A. Buell. A splash 2 tutorial. technical report src-tr-92-087. Supercomputing Research Center, December 1992.
    • (1992) Supercomputing Research Center
    • Buell, D.A.1
  • 11
    • 34548769781 scopus 로고    scopus 로고
    • D. Ross, O. Vellacott, and M. Turner. An fpga-based hardware accelerator for image processing. pages 299-306. More FPGAs: Proceedings of the 1993 International workshop on field-programmable logic and applications, W. Moore and W. Luk, 1993.
    • D. Ross, O. Vellacott, and M. Turner. An fpga-based hardware accelerator for image processing. pages 299-306. More FPGAs: Proceedings of the 1993 International workshop on field-programmable logic and applications, W. Moore and W. Luk, 1993.
  • 12
    • 34548786976 scopus 로고    scopus 로고
    • P. Lysaught, J. Stockwood, J. Law, and D. Girma. Artificial neural network implementation on a fine-grainde FPGA. R. Hartenstein and M.Z. Servit, 1994.
    • P. Lysaught, J. Stockwood, J. Law, and D. Girma. Artificial neural network implementation on a fine-grainde FPGA. R. Hartenstein and M.Z. Servit, 1994.
  • 13
    • 0037878328 scopus 로고    scopus 로고
    • P.C. French and R.W.Taylor. A self-reconfiguring processor. pages 50-59. Proceedings of IEEE Workshop on FPGAs for Custom Computing Machine, D.A. Buell and K.L. Pocek, 1993.
    • P.C. French and R.W.Taylor. A self-reconfiguring processor. pages 50-59. Proceedings of IEEE Workshop on FPGAs for Custom Computing Machine, D.A. Buell and K.L. Pocek, 1993.
  • 15
    • 33746285496 scopus 로고    scopus 로고
    • Configuration quick start guidelines
    • July
    • S. Tapp. Configuration quick start guidelines. XAPP151, July 2003.
    • (2003) XAPP151
    • Tapp, S.1
  • 16
    • 0003740827 scopus 로고    scopus 로고
    • Washington University, Department of Computer Science, Technical Report WUCS-01-13
    • July
    • Edson Horta and John W. Lockwood. Parbit: A tool to transform bitfiles to implement partial reconfiguration of field programmable gate arrays (fpgas). Washington University, Department of Computer Science, Technical Report WUCS-01-13, July 2001.
    • (2001)
    • Horta, E.1    Lockwood, J.W.2
  • 17
    • 34548810019 scopus 로고    scopus 로고
    • Washington University, Department of Computer Science. Version 2.0, Technical Report
    • January
    • David E. Taylor, John W. Lockwood, and Sarang Dharmapurikar. Generalized rad module interface specification of the field programmable port extender (fpx). Washington University, Department of Computer Science. Version 2.0, Technical Report, January 2000.
    • (2000)
    • Taylor, D.E.1    Lockwood, J.W.2    Dharmapurikar, S.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.