-
1
-
-
34548307272
-
Power, thermal, and reliability modeling in nanometer-scale microprocessors
-
DOI 10.1109/MM.2007.58
-
D. Brooks et al., "Power, Thermal, and Reliability Modeling in Nanometer-Scale Microprocessors," IEEE Micro, vol. 27, no. 3, pp. 49-62, May/June 2007. (Pubitemid 47337547)
-
(2007)
IEEE Micro
, vol.27
, Issue.3
, pp. 49-62
-
-
Brooks, D.1
Dick, R.P.2
Joseph, R.3
Shang, L.4
-
5
-
-
33244478578
-
Managing server energy and operational costs in hosting centers
-
SIGMETRICS 2005: International Conference on Measurement and Modeling of Computer Systems - Proceedings
-
Y. Chen, A. Das, W. Qin, A. Sivasubramaniam, Q. Wang, and N. Gautam, "Managing Server Energy and Operational Costs in Hosting Centers," ACM SIGMETRICS Performance Evaluation Rev., vol. 33, no. 1, pp. 303-314, 2005. (Pubitemid 43275430)
-
(2005)
Performance Evaluation Review
, vol.33
, Issue.1
, pp. 303-314
-
-
Chen, Y.1
Sivasubramaniam, A.2
Das, A.3
Wang, Q.4
Qin, W.5
Gautam, N.6
-
7
-
-
33846480613
-
A Performance counter architecture for computing accurate cpi components
-
S. Eyerman, L. Eeckhout, T. Karkhanis, and J.E. Smith, "A Performance Counter Architecture for Computing Accurate CPI Components," ACM SIGOPS Operating Systems Rev., vol. 40, no. 5, 2006.
-
(2006)
ACM SIGOPS Operating Systems Rev.
, vol.40
, Issue.5
-
-
Eyerman, S.1
Eeckhout, L.2
Karkhanis, T.3
Smith, J.E.4
-
10
-
-
55949102822
-
TILTS: A fast architectural-level transient thermal simulation method
-
Y. Han et al., "TILTS: A Fast Architectural-Level Transient Thermal Simulation Method," J. Low Power Electronics, vol. 3, no. 1, pp. 13-21, 2007.
-
(2007)
J. Low Power Electronics
, vol.3
, Issue.1
, pp. 13-21
-
-
Han, Y.1
-
11
-
-
34047123131
-
Dynamic voltage scaling in multitier web servers with end-to-end delay control
-
DOI 10.1109/TC.2007.1003
-
T. Horvath, T. Abdelzaher, K. Skadron, and X. Liu, "Dynamic Voltage Scaling in Multi-Tier Web Servers with End-to-End Delay Control," IEEE Trans. Computers, vol. 56, no. 4, pp. 444-458, Apr. 2007. (Pubitemid 46523079)
-
(2007)
IEEE Transactions on Computers
, vol.56
, Issue.4
, pp. 444-458
-
-
Horvath, T.1
Abdelzaher, T.2
Skadron, K.3
Liu, X.4
-
12
-
-
36949001469
-
An analysis of efficient multi-core global power management policies: Maximizing performance for a given power budget
-
C. Isci, A. Buyuktosunoglu, C.-Y. Cher, P. Bose, and M. Martonosi, "An Analysis of Efficient Multi-Core Global Power Management Policies: Maximizing Performance for a Given Power Budget," Proc. 39th Ann. IEEE/ACM Int'l Symp. Microarchitecture (MICRO-39), 2006.
-
(2006)
Proc. 39th Ann. IEEE/ACM Int'l Symp. Microarchitecture (MICRO-39)
-
-
Isci, C.1
Buyuktosunoglu, A.2
Cher, C.-Y.3
Bose, P.4
Martonosi, M.5
-
14
-
-
33846077897
-
Hardware synthesis of explicit model predictive controllers
-
DOI 10.1109/TCST.2006.883206
-
T.A. Johansen, W. Jackson, R. Schreiber, and P. Tondel, "Hardware Synthesis of Explicit Model Predictive Controllers," IEEE Trans. Control Systems Technology, vol. 15, no. 1, pp. 191-197, Jan. 2007. (Pubitemid 46056111)
-
(2007)
IEEE Transactions on Control Systems Technology
, vol.15
, Issue.1
, pp. 191-197
-
-
Johansen, T.A.1
Jackson, W.2
Schreiber, R.3
Tondel, P.4
-
15
-
-
35948954803
-
Coordinating multiple autonomic managers to achieve specified power-performance tradeoffs
-
J.O. Kephart, H. Chan, R. Das, D.W. Levine, G. Tesauro, F. Rawson, and C. Lefurgy, "Coordinating Multiple Autonomic Managers to Achieve Specified Power-Performance Tradeoffs," Proc. Fourth Int'l Conf. Autonomic Computing (ICAC '07), 2007.
-
(2007)
Proc. Fourth Int'l Conf. Autonomic Computing (ICAC '07)
-
-
Kephart, J.O.1
Chan, H.2
Das, R.3
Levine, D.W.4
Tesauro, G.5
Rawson, F.6
Lefurgy, C.7
-
17
-
-
0025414522
-
Convergence of adaptive control schemes using least-squares parameter estimates
-
DOI 10.1109/9.52293
-
P.R. Kumar, "Convergence of Adaptive Control Schemes Using Least-Squares Parameter Estimates," IEEE Trans. Automatic Control, vol. 35, no. 4, pp. 416-424, Apr. 1990. (Pubitemid 20701320)
-
(1990)
IEEE Transactions on Automatic Control
, vol.35
, Issue.4
, pp. 416-424
-
-
Kumar, P.R.1
-
18
-
-
51649104701
-
Power and performance management of virtualized computing environments via lookahead control
-
D. Kusic, J. Kephart, J. Hanson, N. Kandasamy, and G. Jiang, "Power and Performance Management of Virtualized Computing Environments via Lookahead Control," Proc. Int'l Conf. Autonomic Computing (ICAC '08), 2008.
-
(2008)
Proc. Int'l Conf. Autonomic Computing (ICAC '08)
-
-
Kusic, D.1
Kephart, J.2
Hanson, J.3
Kandasamy, N.4
Jiang, G.5
-
21
-
-
62749159387
-
Optimal multivariate control for differentiated services on a shared hosting platform
-
X. Liu et al., "Optimal Multivariate Control for Differentiated Services on a Shared Hosting Platform," Proc. IEEE 46th Conf. Decision and Control (CDC), 2007.
-
(2007)
Proc. IEEE 46th Conf. Decision and Control (CDC)
-
-
Liu, X.1
-
23
-
-
31344454872
-
Power and temperature control on a 90-nm Itanium family processor
-
DOI 10.1109/JSSC.2005.859902
-
R. McGowen et al., "Power and Temperature Control on a 90-nm Itanium Family Processor," IEEE J. Solid-State Circuits, vol. 41, no. 1, pp. 229-237, Jan. 2006. (Pubitemid 43145980)
-
(2006)
IEEE Journal of Solid-State Circuits
, vol.41
, Issue.1
, pp. 229-237
-
-
McGowen, R.1
Poirier, C.A.2
Bostak, C.3
Ignowski, J.4
Millican, M.5
Parks, W.H.6
Naffziger, S.7
-
24
-
-
63549102138
-
Multi-optimization power management for chip multiprocessors
-
K. Meng, R. Joseph, R.P. Dick, and L. Shang, "Multi-Optimization Power Management for Chip Multiprocessors," Proc. 17th Int'l Conf. Parallel Architectures and Compilation Techniques (PACT '08), 2008.
-
(2008)
Proc. 17th Int'l Conf. Parallel Architectures and Compilation Techniques (PACT '08)
-
-
Meng, K.1
Joseph, R.2
Dick, R.P.3
Shang, L.4
-
27
-
-
0033672408
-
Gated-Vdd: A circuit technique to reduce leakage in deep-submicron cache memories
-
M. Powell, S.-H. Yang, B. Falsafi, K. Roy, and T.N. Vijaykumar, "Gated-Vdd: A Circuit Technique to Reduce Leakage in Deep-Submicron Cache Memories," Proc. Int'l Symp. Low Power Electronics and Design (ISLPED '00), 2000.
-
(2000)
Proc. Int'l Symp. Low Power Electronics and Design (ISLPED '00)
-
-
Powell, M.1
Yang, S.-H.2
Falsafi, B.3
Roy, K.4
Vijaykumar, T.N.5
-
29
-
-
77957808890
-
No power struggles: Coordinated multi-level power management for the data center
-
R. Raghavendra, P. Ranganathan, V. Talwar, Z. Wang, and X. Zhu, "No Power Struggles: Coordinated Multi-Level Power Management for the Data Center," Proc. Int'l Conf. Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2008.
-
(2008)
Proc. Int'l Conf. Architectural Support for Programming Languages and Operating Systems (ASPLOS)
-
-
Raghavendra, R.1
Ranganathan, P.2
Talwar, V.3
Wang, Z.4
Zhu, X.5
-
30
-
-
33845913757
-
Ensemble-level power management for dense blade servers
-
P. Ranganathan, P. Leech, D. Irwin, and J.S. Chase, "Ensemble-Level Power Management for Dense Blade Servers," Proc. 33rd Ann. Int'l Symp. Computer Architecture (ISCA '06), 2006.
-
(2006)
Proc. 33rd Ann. Int'l Symp. Computer Architecture (ISCA '06)
-
-
Ranganathan, P.1
Leech, P.2
Irwin, D.3
Chase, J.S.4
-
31
-
-
0348195815
-
Power-aware QoS management in web servers
-
V. Sharma, A. Thomas, T. Abdelzaher, K. Skadron, and Z. Lu, "Power-Aware QoS Management in Web Servers," Proc. 24th IEEE Int'l Real-Time Systems Symp. (RTSS), 2003.
-
(2003)
Proc. 24th IEEE Int'l Real-Time Systems Symp. (RTSS)
-
-
Sharma, V.1
Thomas, A.2
Abdelzaher, T.3
Skadron, K.4
Lu, Z.5
-
33
-
-
85009352442
-
Temperature-aware microarchitecture: Modeling and implementation
-
K. Skadron et al., "Temperature-Aware Microarchitecture: Modeling and Implementation," ACM Trans. Architecture and Code Optimization, vol. 1, no. 1, pp. 1-32, 2004.
-
(2004)
ACM Trans. Architecture and Code Optimization
, vol.1
, Issue.1
, pp. 1-32
-
-
Skadron, K.1
-
37
-
-
70449659803
-
Ship: Scalable hierarchical power control for large-scale data centers
-
X. Wang, M. Chen, C. Lefurgy, and T.W. Keller, "Ship: Scalable Hierarchical Power Control for Large-Scale Data Centers," Proc. Int'l Conf. Parallel Architectures and Compilation Techniques (PACT '09), 2009.
-
(2009)
Proc. Int'l Conf. Parallel Architectures and Compilation Techniques (PACT '09)
-
-
Wang, X.1
Chen, M.2
Lefurgy, C.3
Keller, T.W.4
-
41
-
-
0030149507
-
Cacti: An enhanced cache access and cycle time model
-
May
-
S.J.E. Wilton and N.P. Jouppi, "Cacti: An Enhanced Cache Access and Cycle Time Model," IEEE J. Solid-State Circuits, vol. 31, no. 5, pp. 677-688, May 1996.
-
(1996)
IEEE J. Solid-State Circuits
, vol.31
, Issue.5
, pp. 677-688
-
-
Wilton, S.J.E.1
Jouppi, N.P.2
-
42
-
-
34547206285
-
A systematic method for functional unit power estimation in microprocessors
-
W. Wu, L. Jin, J. Yang, P. Liu, and S.X.-D. Tan, "A Systematic Method for Functional Unit Power Estimation in Microprocessors," Proc. 43rd Ann. Design Automation Conf. (DAC '06), 2006.
-
(2006)
Proc. 43rd Ann. Design Automation Conf. (DAC '06)
-
-
Wu, W.1
Jin, L.2
Yang, J.3
Liu, P.4
Tan, S.X.-D.5
-
43
-
-
67650300737
-
Hotleakage: A temperature-aware model of subthreshold and gate leakage for architects
-
Univ. of Virginia
-
Y. Zhang et al., "Hotleakage: A Temperature-Aware Model of Subthreshold and Gate Leakage for Architects," Technical Report CS-2003-05, Univ. of Virginia, 2003.
-
(2003)
Technical Report CS- 2003-05
-
-
Zhang, Y.1
-
44
-
-
47849132667
-
Three-dimensional chip-multiprocessor run-time thermal management
-
Aug.
-
C. Zhu, Z.P. Gu, L. Shang, R.P. Dick, and R. Joseph, "Three- Dimensional Chip-Multiprocessor Run-Time Thermal Management," IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol. 27, no. 8, pp. 1479-1492, Aug. 2008.
-
(2008)
IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems
, vol.27
, Issue.8
, pp. 1479-1492
-
-
Zhu, C.1
Gu, Z.P.2
Shang, L.3
Dick, R.P.4
Joseph, R.5
|