Power, thermal, and reliability modeling in nanometer-scale microprocessors

IEEE Micro

Volumn 27, Issue 3, 2007, Pages 49-62

  Brooks, David ^a   Dick, Robert P ^b   Joseph, Russ ^b   Shang, Li ^c  

^a HARVARD UNIVERSITY   (United States)

^b NORTHWESTERN UNIVERSITY   (United States)

^c QUEEN S UNIVERSITY   (Canada)

Author keywords

Modeling of computer architecture; Power models; Process variation; Reliability models; Thermal analysis

Indexed keywords

ERROR ANALYSIS; MICROPROCESSOR CHIPS; MULTIPROCESSING SYSTEMS; OPTIMIZATION; RELIABILITY THEORY; VARIATIONAL TECHNIQUES;

POWER MODELS; PROCESS VARIATION; RELIABILITY MODEL;

COMPUTER ARCHITECTURE;

EID: 34548307272     PISSN: 02721732     EISSN: None     Source Type: Journal    
DOI: 10.1109/MM.2007.58     Document Type: Article

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