Optical Ring Network-on-Chip (ORNoC): Architecture and design methodology

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2011, Pages 788-793

  Le Beux, Sébastien ^a,b   Trajkovic, Jelena ^a   O'Connor, Ian ^b   Nicolescu, Gabriela ^a   Bois, Guy ^a   Paulin, Pierre ^c  

^a ÉCOLE POLYTECHNIQUE DE MONTRÉAL   (Canada)

^b ECOLE CENTRALE DE LYON   (France)

^c STMICROELECTRONICS   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

3D ARCHITECTURES; CONTENTION-FREE; DESIGN CONSTRAINTS; DESIGN METHODOLOGY; EFFICIENT DESIGNS; ELECTROMAGNETIC NOISE; HIGH THROUGHPUT; HIGH-PERFORMANCE INTERCONNECT; MULTI-PROCESSORS; NETWORK ON CHIP; NETWORK SCALE; NEW DESIGN; ON-CHIP INTERCONNECTS; OPTICAL NETWORK ON CHIP; OPTICAL RINGS; PROCESSING ELEMENTS; PROPOSED ARCHITECTURES; SYSTEM ON CHIPS; SYSTEM-ON-CHIP;

APPLICATION SPECIFIC INTEGRATED CIRCUITS; ARTS COMPUTING; DESIGN; FIBER OPTIC NETWORKS; MICROPROCESSOR CHIPS; MULTIPROCESSING SYSTEMS; OPTICAL INTERCONNECTS; PROGRAMMABLE LOGIC CONTROLLERS; SERVERS; VLSI CIRCUITS; WAVEGUIDES;

NETWORK ARCHITECTURE;

EID: 79957536036     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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