Fault injection in modern microprocessors using on-chip debugging infrastructures

IEEE Transactions on Dependable and Secure Computing

Volumn 8, Issue 2, 2011, Pages 308-314

  Portela García, Marta ^a   López Ongil, Celia ^a   García Valderas, Mario ^a   Entrena, Luis ^a  

^a UNIVERSIDAD CARLOS III DE MADRID   (Spain)

Author keywords

COTS microprocessors; fault injection; fault tolerance; single event upset; soft errors

Indexed keywords

COMMERCIAL OFF-THE-SHELF; COMPUTER DEBUGGING; COST EFFECTIVENESS; FAULT TOLERANCE; RADIATION HARDENING; SOFTWARE TESTING;

COST-EFFECTIVE SOLUTIONS; FAULT INJECTION; HARDWARE IMPLEMENTATIONS; MODERN MICROPROCESSOR; ON-CHIP-DEBUGGING; SINGLE EVENT UPSETS; SOFT ERROR; SOFTWARE DEBUGGING;

PROGRAM DEBUGGING;

EID: 78951489503     PISSN: 15455971     EISSN: None     Source Type: Journal    
DOI: 10.1109/TDSC.2010.50     Document Type: Article

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