Xception: A technique for the experimental evaluation of dependability in modern computers

IEEE Transactions on Software Engineering

Volumn 24, Issue 2, 1998, Pages 125-136

  Carreira, João ^a   Madeira, Henrique ^a   Silva, João Gabriel ^a  

^a UNIVERSITY OF COIMBRA   (Portugal)

Author keywords

Dependability evaluation; Fault injection; Real time; Risc processors

Indexed keywords

FAULT TOLERANT COMPUTER SYSTEMS; PROGRAM DEBUGGING; REAL TIME SYSTEMS; REDUCED INSTRUCTION SET COMPUTING;

FAULT INJECTION; SOFTWARE PACKAGE XCEPTION;

COMPUTER SOFTWARE;

EID: 0032002385     PISSN: 00985589     EISSN: None     Source Type: Journal    
DOI: 10.1109/32.666826     Document Type: Article

References (49)

1. J. Arlat et al., "Fault Injection for Dependability Validation: A Methodology and Some Applications," IEEE Trans. Software Eng., vol. 16, no. 2, pp. 166-182, Feb. 1990.
2. J. Christmansson and R. Chillarege, "Generation of an Error Set That Emulates Software Faults Based on Field Data," Proc. FTCS-27, Sendai, Japan, pp. 304-313, 1996.
3. H. Madeira and J.G. Silva, "Experimental Evaluation of the Fail-Silent Behavior in Computers without Error Masking," Proc. FTCS-24, Austin, Texas, pp. 350-359, June 1994.
4. J. Karlsson, P. Lidén, P. Dahlgren, R. Johansson, and U. Gunneflo, "Using Heavy-Ion Radiation to Validate Fault-Handling Mechanisms," IEEE Micro, vol. 14, no. 1, pp. 8-32, 1994.
5. G. Miremadi, J. Karlsson, U. Gunneflo, and J. Torin, "Two Software Techniques for On-Line Error Detection," Proc. FTCS-22, pp. 328-335, 1992.
6. H. Madeira, M. Rela, F. Moreira, and J. Silva, "RIFLE: A General Purpose Pin-Level Fault Injector," Proc. First European Dependable Computing Conf., Berlin, pp. 199-216, Oct. 1994.
7. G. Choi and R. Iyer, "Focus: An Experimental Environment for Fault Sensitivity Analysis," IEEE Trans. Computers, vol. 41, no. 12, Dec. 1992.
8. E. Jenn, J. Arlat, M. Rimén, J. Ohlsson, and J. Karlsson, "Fault Injection into VHDL Models: The MEFISTO Tool," Proc. FTCS-24, Austin, Texas, pp. 336-344, 1994.
9. Z. Segall and T. Lin, "FIAT: Fault Injection Based Automated Testing Environment," Proc. 18th Int'l Symp. Fault-Tolerant Computing, pp. 102-107, June 1988.
10. R. Chillarege and N. Bowen, "Understanding Large Systems Failures - A Fault Injection Experiment," Proc. 19th FTCS, Chicago, pp. 356-363, June 1989.
11. S. Han, H. Rosenberg, and K. Shin, "DOCTOR: An Integrated Software Fault Injection Environment," Technical Report, Univ. of Michigan, 1993.
12. G. Kanawati, N. Kanawati, and J. Abraham, "FERRARI: A Tool for the Validation of System Dependability Properties," FTCS-22, Digest of Papers, pp. 336-344, 1992.
13. W. Kao, R.K. Iyer, and D. Tang, "FINE: A Fault Injection and Monitoring Environment for Tracing the UNIXSystem Behavior Under Faults," IEEE Trans. Software Eng., vol. 19. no. 11, Nov. 1993
14. W. Kao and R.K. Iyer, "DEFINE: A Distributed Fault Injection and Monitoring Environment," Proc. Workshop Fault-Tolerant Parallel and Distributed Systems, June 1994.
15. K. Echtle and M. Leu, "The EFA Fault Injector for Fault-Tolerant Distributed System Testing," Proc. Workshop Fault-Tolerant Parallel and Distributed. Systems, pp. 28-35, 1992.
16. J. Carreira, H. Madeira, and J.G. Silva,"Assessing the Effects of Communication Faults on Parallel Applications, "Proc. IPDS'95, Erlangen, Germany, Apr. 1995.
17. N.A. Kanawati, G .Kanawati, and J. Abraham, "Dependability Evaluation Using Hybrid Fault/Error Injection," Proc. IPDS'95, pp. 224-233, Erlangen, Germany, Apr. 1995.
18. L.T. Young, R.K. Iyer, K.K. Goswami, and C. Alonso, "A Hybrid Monitor Assisted Fault Injection Environment," Proc. Third IFIP Working Conf. Dependable Computing for Critical Applications, Sicily, Italy, Sept. 1992.
19. C.R. Yount and D.P. Siewiorek, "A Methodology for the Rapid Injection of Transient Hardware Errors," IEEE Trans. Computers, vol. 45, no. 8, pp. 881-891, 1996.
20. J. Guethoff and V. Sieh, "Improving the Efficiency of Fault Injection Based Dependability Evaluation," Proc. Int'l Symp. Fault-Tolerant Computing, FTCS-25, Pasadena, Calif., pp. 196-206, 1995.
21. R. Iyer and D. Rossetti, "A Measurement-Based Model for Workload Dependance of CPU Errors," IEEE Trans. Computers, vol. 35, pp. 511-519, June 1986.
22. E. Czeck and D. Siewiorek, "Effects of Transient Gate-Level Faults on Program Behavior," FTCS-20, Newcastle-upon-Tyne, England, pp. 236-243, June 1990.
23. F.T. Luk, "Algorithm-Based Fault Tolerance for Parallel Matrix Solvers," Proc. SPIE Real-Time Signal Processing VIII, vol. 564, pp. 49-53, 1985.
24. G. Kanawati, N. Kanawati, and J. Abraham, "EMAX: An Automatic Extractor of High-Level Error Models," Proc. AIAA Computing Aerospace Conf., San Diego, Calif., pp. 1,297-1,306, Oct. 1993.
25. E. Czeck, "Estimates of the Abilities of Software-Implemented Fault Injection to Represent Gate-Level Faults," Proc. Int'l Workshop Fault and Error Injection for Dependability Validation of Computer Systems, Gothemburg, Sweden, IEEE, June 1993.
26. M. Rimen, J. Ohlsson, and J. Torin, "On Microprocessor Error Behavior Modeling," Proc. 24th Int'l Symp. Fault-Tolerant Computing FTCS-24, Austin, Texas, pp. 76-85, 1994.
27. "PA-RISC 1.1 Achitecture and Instruction Set Reference Manual," HP Part Number: 09/40-90039, third edition, Feb. 1994.
28. T. Mathisen, "Pentium Secrets," BYTE, pp. 191-192, July 1994.
29. "DECchip 21064 and DECchip 21064a Alpha AXP Microprocessors Hardware Reference Manual," order no. EC-Q9ZUA-TE, Digital Equipment Corp., June 1994.
30. J. Heinrich, "MIPS R4400 Microprocessor User's Manual," Mips Techologies, 1994
31. E.H. Welbon, C.C. Chan-Nui, D.J. Shippy, and D.A. Hicks, "POWER2 Performance Monitor," IBM J. Research and Development, vol. 38, no. 5, 19xx.
32. "PowerPC601 RISC Microprocessor User's Manual" Motorola, July 1993
33. D.P. Siewiorek and R.S. Shwarz, The Theory and Practice of Reliable Design. Bedford, Mass.: Digital Press, Educational Services, DEC, 1982.
34. P.K. Lala, "Fault Tolerant and Fault Testable Hardware Design," New York: Prentice Hall Int'l, 1985.
35. J. Carreira, "Software Fault Injection in Parallel Systems," Tech report, Univ. of Coimbra, Portugal, July 1995. http://dsg.dei.uc.pt
36. D. Powell, E. Martins, and J. Arlat, "Estimators for Fault Tolerance Coverage Evaluation," IEEE Trans. Computers, vol. 44, no. 2, Feb. 1995.
37. J.G. Silva, J. Carreira, and F. Moreira, "ParLin: From a Centralized Tuple Space to Adaptive Hashing, "Transputer Applications and Systems'94, pp. 91-104. IOS Press, 1994.
38. R.Chowdhury and P. Banerjee, "A Fault-Tolerant Algorithm for Iterative Solution of the Laplace Equation," Proc. Int'l Conf. Parallel Processing, pp. II-133-III-140, 1993.
39. G. Ries, G. Choi, and R. Iyer, "Device-Level Transient Fault Modeling," Proc. 24th Int'l Symp. Fault-Tolerant Computing, FTCS-24, Austin, Texas, pp. 76-83, 1994.
40. R. Johansson, "On Single Event Phenomena in Microprocessors," TR162L, Dept. of Computing Eng., Chalmers Univ. of Technology, Gotenburg, Sweden, 1993.
41. M.-C. Hsueh, T.K. Tsai, and R.K. Iyer, "Fault Injection Techniques and Tools," Computer, vol. 30, no. 4, pp. 75-82, Apr. 1997.
42. J. Arlat, "Fault Injection for the Experimental Validation of Fault-Tolerant Systems," Proc. Workshop Fault-Tolerant Systems, Kyoto, Japan, IEICE, Tokyo, pp. 33-40, 1992.
43. J.A. Clark and D.K. Pradhan, "Fault Injection - A Method for Validating Computer-System Dependability," Computer, vol. 28, no. 6, pp. 47-56, June 1995.
44. R.K. Iyer, "Experimental Evaluation," Proc. 25th Int'l Symp. Fault-Tolerant Computing, FTCS-25, Pasadena, Calif., special issue, pp. 115-132, 1995.
45. J. Karlsson, P. Folkesson, J. Arlat, Y. Crouzet, G. Leber, and J. Reisinger, "Application of Three Physical Fault Injection Techniques to the Experimental Assessment of the MARS Architecture," Proc. Fifth IFIP Working Conf. Dependable Computing for Critical Applications, DCCA-5, Urbana-Champaign, 111., pp. 150-151, 1995.
46. K.H. Huang and J.A. Abraham, "Algorithm-Based Fault Tolerance for Matrix Operations," IEEE Trans. Computers, vol. 33, no. 6, pp. 518-528, 1984.
47. T.K. Tsai, R.K. Iyer, and D. Jewitt, "An Approach Towards Benchmarking of Fault-Tolerant Commercial Systems," Proc. FTCS-26, Sendai, Japan, pp. 314-323, 1996.
48. J.G. Silva, J. Carreira, H. Madeira, D. Costa, and F. Moreira, "Experimental Assessment of Parallel Systems," Proc. FTCS-26, Japan, pp. 415-425, June 1996.
49. "PARIX 1.3-PowerPC, Software Documentation," Parsytec Gmbh, 1994.