Low-power and wide-bandwidth cyclic ADC with capacitor and opamp reuse techniques for CMOS image sensor application

IEEE Sensors Journal

Volumn 9, Issue 12, 2009, Pages 2044-2054

  Lin, Jin Fu ^a   Chang, Soon Jyh ^a   Chiu, Chin Fong ^b   Tsai, Hann Huei ^b   Wang, Jiann Jong ^b  

^a NATIONAL CHENG KUNG UNIVERSITY   (Taiwan)

^b NATIONAL APPLIED RESEARCH LABORATORIES   (Taiwan)

Author keywords

Analog to digital converter (ADC); CMOS image sensor; Cyclic ADC; Data converter; Low power; Programmable gain amplifier (PGA)

Indexed keywords

ANALOG TO DIGITAL CONVERTERS; CMOS IMAGE SENSOR; CYCLIC ADC; DATA CONVERTER; LOW POWER; PROGRAMMABLE GAIN AMPLIFIER (PGA);

CAPACITORS; DIFFERENTIAL AMPLIFIERS; DIGITAL CAMERAS; FREQUENCY CONVERTERS; IMAGE SENSORS; OPERATIONAL AMPLIFIERS; PROGRAMMED CONTROL SYSTEMS; SPECIFICATIONS;

ANALOG TO DIGITAL CONVERSION;

EID: 78951473583     PISSN: 1530437X     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSEN.2009.2033198     Document Type: Article

References (15)

1. K. Kagawa, S. Shishido, M. Nunoshita, and J. Ohta, "A 3.6 pW/frame. pixel 1.35 V PWM CMOS imager with dynamic pixel readout and no static bias current," in Proc. ISSCC Dig. Tech. Papers, Feb. 2008, pp. 54-55.
2. A. Krymski and K. Tajima, "CMOS image sensor with integrated 4 Gb/s camera link transmitter," in Proc. ISSCC Dig. Tech. Papers, Feb. 2006, pp. 504-505.
3. I. Takayanagi, M. Shirakawa, K. Mitani, M. Sugawara, S. Iversen, J. Moholt, J. Nakamura, and E. R. Fossum, "A 1.25-inch 60-frames/s 8.3 Mpixel digital-output CMOS image sensor," IEEE J. Solid-State Circuits, vol. 40, no. 11, pp. 2305-2314, Nov. 2005.
4. M. Furuta, Y. Nishikawa, T. Inoue, and S. Kawahito, "A high-speed, high-sensitivity digital CMOS image sensor with a global shutter and 12-bit column-parallel cyclic A/D converters," IEEE J. Solid-State Circuits, vol. 42, no. 4, pp. 766-774, Apr. 2007. (Pubitemid 46504966)
5. J. Bouvier, M. Dahoumane, D. Dzahini, J. Y. Hostachy, E. Lagorio, O. Rossetto, H. Ghazlane, and D. Dallet, "A low power and low signal 5-bit 25 MS/s pipelined ADC for monolithic active pixel sensors," IEEE Trans. Nucl. Sci., vol. 54, no. 4, pp. 1195-1200, Aug. 2007. (Pubitemid 47295091)
6. P. Y. Wu, V. S. L. Cheung, and H. C. Luong, "A 1-V 100-MS/s 8-bit CMOS switched-opamp pipelined ADC using loading-free architecture," IEEE J. Solid-State Circuits, vol. 42, no. 4, pp. 730-738, Apr. 2007. (Pubitemid 46495389)
7. T. Cho and P. R. Gray, "A 10 b 20 Msamples/s, 35 mW pipeline A/D converter," IEEE J. Solid-State Circuits, vol. 30, no. 3, pp. 166-172, Mar. 1995.
8. D. Kurose, T. Ito, T. Ueno, T. Yamaji, and T. Itakura, "55-mW 200- MSPS 10-bit pipeline ADCs for wireless receivers," IEEE J. Solid-State Circuits, vol. 41, no. 7, pp. 1583-1595, Jul. 2006.
9. S. T. Ryu, B. S. Song, and K. Bacrania, "A 10-bit 50-MS/s pipelined ADC with opamp current reuse," IEEE J. Solid-State Circuits, vol. 42, no. 3, pp. 475-485, Mar. 2007. (Pubitemid 46376029)
10. O. Choksi and L. R. Carley, "Analysis of switched-capacitor commonmode feedback circuit," IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 50, no. 12, pp. 1583-1595, Dec. 2003.
11. B. M. Min, P. Kim, F. W. Bowman, III, D. M. Boisvert, and A. J. Aude, "A 69-mW 10-bit 80-MSample/s pipelined CMOS ADC," IEEE J. Solid-State Circuits, vol. 38, no. 12, pp. 2031-2039, Dec. 2003.
12. J. Doernberg, H. S. Lee, and D. A. Hodges, "Full-speed testing of A/D converters," IEEE J. Solid-State Circuits, vol. SC-19, no. 6, pp. 820-827, Dec. 1984.
13. M. F. Snoeij, P. Donegan, A. J. P. Theuwissen, K. A. A. Makinwa, and J. H. Huijsing, "Multiple-ramp column-parallel ADC architectures for CMOS image sensors," IEEE J. Solid-State Circuits, vol. 42, no. 12, pp. 2968-2976, Dec. 2007.
14. S. Lim, J. Lee, D. Kim, and G. Han, "A high-speed CMOS image sensor with column-parallel two-step single slope ADCs," IEEE Trans. Electron Devices, vol. 56, no. 3, pp. 393-398, Mar. 2009.
15. O. A. Adeniran and A. Demosthenous, "An ultra-energy-efficient wide-bandwidth video pipeline ADC using optimized architectural partitioning," IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 53, no. 12, pp. 2485-2497, Dec. 2006. (Pubitemid 46002247)