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39549091849
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CMOS image sensor with integrated 4 Gb/s camera link transmitter
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San Francisco, CA, Feb
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Krymski, A.1
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0037247586
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A high-speed, 240-frame/s, 4.1-MPixel CMOS sensor
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Jan
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A. Krymski, N. E. Bock, N. Tu, D. Van Blerkom, and E. R. Fossum, "A high-speed, 240-frame/s, 4.1-MPixel CMOS sensor," IEEE Trans. Electron Devices, vol. 50, no. 1, pp. 130-135, Jan. 2003.
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3
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27844536850
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A 1.25-inch 60-frames/s 8.3-Mpixel digital-output CMOS image sensor
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Nov
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I. Takayanagi, M. Shirakawa, K. Mitani, M. Sugawara, S. Iversen, J. Moholt, J. Nakamura, and E. R. Fossum, "A 1.25-inch 60-frames/s 8.3-Mpixel digital-output CMOS image sensor," IEEE J. Solid-State Circuits, vol. 40, no. 11, pp. 2305-2314, Nov. 2005.
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Fossum, E.R.8
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4
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33947723468
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A high-speed, high-sensitivity digital CMOS image sensor with a global shutter and 12-bit column-parallel cyclic A/D converters
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Apr
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M. Furuta, Y. Nishikawa, T. Inoue, and S. Kawahito, "A high-speed, high-sensitivity digital CMOS image sensor with a global shutter and 12-bit column-parallel cyclic A/D converters," IEEE J. Solid-State Circuits, vol. 42, no. 4, pp. 766-774, Apr. 2007.
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Furuta, M.1
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5
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33845621768
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A 1/2-inch 7.2 MPixel CMOS image sensor with 2.25 μm pixels using 4-shared pixel structure for pixel-level summation
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San Francisco, CA, Feb
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Y. Kim, Y. T. Kim, S. H. Choi, H. K. Kong, S. I. Hwang, J. H. Ko, B. S. Kim, T. Asaba, S. H. Lim, J. S. Hahn, J. H. Im, T. S. Oh, D. M. Yi, J. M. Lee, W. P. Yang, J. C. Ahn, E. S. Jung, and Y. H. Lee, "A 1/2-inch 7.2 MPixel CMOS image sensor with 2.25 μm pixels using 4-shared pixel structure for pixel-level summation," in Proc. IEEE ISSCC Dig. Tech. Papers, San Francisco, CA, Feb. 2006, pp. 1994-2003.
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Kim, Y.1
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Kim, B.S.7
Asaba, T.8
Lim, S.H.9
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Ahn, J.C.16
Jung, E.S.17
Lee, Y.H.18
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6
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33745126305
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Ramp slope built-in-self-calibration scheme for single-slope column analog-to-digital converter complementary metal-oxide-semiconductor image sensor
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Feb
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S. Ham, W. Jung, D. Lee, Y. Lee, and G. Han, "Ramp slope built-in-self-calibration scheme for single-slope column analog-to-digital converter complementary metal-oxide-semiconductor image sensor," Jpn. J. Appl. Phys., vol. 45, no. 7, pp. L201-L203, Feb. 2006.
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Ham, S.1
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7
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33847127163
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High-speed digital double sampling with analog CDS on column parallel ADC architecture for low-noise active pixel sensor
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San Francisco, CA, Feb
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Y. Nitta, Y. Muramatsu, K. Amano, T. Toyama, J. Yamamoto, K. Mishina, A. Suzuki, T. Taura, A. Kato, M. Kikuchi, Y. Yasui, H. Nomura, and N. Fukushima, "High-speed digital double sampling with analog CDS on column parallel ADC architecture for low-noise active pixel sensor," in Proc. IEEE ISSCC Dig. Tech. Papers, San Francisco, CA, Feb. 2006, pp. 2024-2031.
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Nitta, Y.1
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Toyama, T.4
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Mishina, K.6
Suzuki, A.7
Taura, T.8
Kato, A.9
Kikuchi, M.10
Yasui, Y.11
Nomura, H.12
Fukushima, N.13
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8
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33845602549
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A 1/1.8-inch 6.4 Mpixel 60 frame/s CMOS image sensor with seamless mode change
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Dec
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S. Yoshihara, Y. Nitta, M. Kikuchi, K. Koseki, Y. Ito, Y. Inada, S. Kuramochi, H. Wakabayashi, M. Okano, H. Kuriyama, J. Inutsuka, A. Tajima, T. Nakajima, Y. Kudoh, F. Koga, Y. Kasagi, S. Watanabe, and T. Nomoto, "A 1/1.8-inch 6.4 Mpixel 60 frame/s CMOS image sensor with seamless mode change," IEEE J. Solid-State Circuits, vol. 41, no. 12, pp. 2998-3006, Dec. 2006.
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Yoshihara, S.1
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Ito, Y.5
Inada, Y.6
Kuramochi, S.7
Wakabayashi, H.8
Okano, M.9
Kuriyama, H.10
Inutsuka, J.11
Tajima, A.12
Nakajima, T.13
Kudoh, Y.14
Koga, F.15
Kasagi, Y.16
Watanabe, S.17
Nomoto, T.18
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9
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54249157406
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Multiple-ramp column-parallel ADC architectures for CMOS image sensors
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Dec
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M. F. Snoeij, P. Donegan, A. J. P. Theuwissen, K. A. A. Makinwa, and J. H. Huijsing, "Multiple-ramp column-parallel ADC architectures for CMOS image sensors," IEEE J. Solid-State Circuits, vol. 42, no. 12, pp. 2968-2976, Dec. 2007.
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Snoeij, M.F.1
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Makinwa, K.A.A.4
Huijsing, J.H.5
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10
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34047110171
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A new simultaneous multislope ADC architecture for array implementations
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Sep
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L. Lindgren, "A new simultaneous multislope ADC architecture for array implementations," IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 53, no. 9, pp. 921-925, Sep. 2006.
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Lindgren, L.1
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11
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62749092382
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Double-ramp ADC for CMOS sensors, U.S. Patent 6 670 904, Dec. 30, 2003
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"Double-ramp ADC for CMOS sensors," U.S. Patent 6 670 904, Dec. 30, 2003.
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12
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62749150689
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A 10 b column-wise two-stage single-slope ADC for high-speed CMOS image sensor
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Ogunquit, ME, Jun
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J. Lee, S. Lim, and G. Han, "A 10 b column-wise two-stage single-slope ADC for high-speed CMOS image sensor," in Proc. IEEE Int. Image Sensor Workshop, Ogunquit, ME, Jun. 2007, pp. 196-199.
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Lee, J.1
Lim, S.2
Han, G.3
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14
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62749160648
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A new correlated double sampling and single slope ADC circuit for CMOS image sensors
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Seoul, Korea, Oct
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S. Lim, J. Cheon, S. Ham, and G. Han, "A new correlated double sampling and single slope ADC circuit for CMOS image sensors," in Proc. Int. SoC Des. Conf., Seoul, Korea, Oct. 2004, pp. 129-131.
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Lim, S.1
Cheon, J.2
Ham, S.3
Han, G.4
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