A case for lifetime-aware task mapping in embedded chip multiprocessors

Embedded Systems Week 2010 - Proceedings of the 8th IEEE/ACM/IFIP International Conference on Compilers, Architecture and Synthesis for Embedded Systems, CODES+ISSS'2010

Volumn , Issue , 2010, Pages 145-154

  Hartman, Adam S ^a   Thomas, Donald E ^a   Meyer, Brett H ^b  

^a CARNEGIE MELLON UNIVERSITY   (United States)

^b University of Virginia   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ANT-COLONY OPTIMIZATION; AVERAGE SYSTEM; CHIP MULTIPROCESSOR; COMPONENT FAILURES; DESIGN CONSTRAINTS; OPTIMAL MAPPING; OPTIMAL RESULTS; PHYSICAL PARAMETERS; SUPPLY VOLTAGES; SYSTEM TEMPERATURE; TASK MAPPING; TEMPERATURE-AWARE DESIGN; LIFETIME-AWARE; TEMPERATURE-AWARE;

ALGORITHMS; ARTIFICIAL INTELLIGENCE; CURRENT VOLTAGE CHARACTERISTICS; DESIGN; EMBEDDED SYSTEMS; MULTIPROCESSING SYSTEMS; OPTIMIZATION;

MAPPING;

EID: 78650659968     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1878961.1878987     Document Type: Conference Paper

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