-
1
-
-
0035212298
-
Analysis of substrate thermal gradient effects on optimal buffer insertion
-
A. H. Ajami, K. Banerjee, and M. Pedram. Analysis of substrate thermal gradient effects on optimal buffer insertion. In ICCAD, pages 44-48, 2001.
-
(2001)
ICCAD
, pp. 44-48
-
-
Ajami, A.H.1
Banerjee, K.2
Pedram, M.3
-
2
-
-
20444496778
-
Modeling and analysis of nonuniform substrate temperature effects on global ULSI interconnects
-
June
-
A. H. Ajami, K. Banerjee, and M. Pedram. Modeling and analysis of nonuniform substrate temperature effects on global ULSI interconnects. IEEE Transactions on CAD, 24(6):849-861, June 2005.
-
(2005)
IEEE Transactions on CAD
, vol.24
, Issue.6
, pp. 849-861
-
-
Ajami, A.H.1
Banerjee, K.2
Pedram, M.3
-
3
-
-
85165836586
-
-
D. Atienza, P. D. Valle, G. Paci, F. Poletti, L. Benini, G. D. Micheli, and J. M. Mendias. A fast HW/SW FPGA-based thermal emulation framework for multi-processor system-on-chip. In DAC, 2006.
-
D. Atienza, P. D. Valle, G. Paci, F. Poletti, L. Benini, G. D. Micheli, and J. M. Mendias. A fast HW/SW FPGA-based thermal emulation framework for multi-processor system-on-chip. In DAC, 2006.
-
-
-
-
4
-
-
0033706197
-
A survey of design techniques for system-level dynamic power management
-
L. Benini, A. Bogliolo, and G. D. Micheli. A survey of design techniques for system-level dynamic power management. IEEE Trans. Very Large Scale Integr. Syst., 8(3):299-316, 2000.
-
(2000)
IEEE Trans. Very Large Scale Integr. Syst
, vol.8
, Issue.3
, pp. 299-316
-
-
Benini, L.1
Bogliolo, A.2
Micheli, G.D.3
-
6
-
-
34047127465
-
Thermal resilient bounded-skew clock tree optimization methodology
-
A. Chakraborty, P. Sithambaram, K. Duraisami, A. Macii, E. Macii, and M. Poncino. Thermal resilient bounded-skew clock tree optimization methodology. In DATE, 2006.
-
(2006)
DATE
-
-
Chakraborty, A.1
Sithambaram, P.2
Duraisami, K.3
Macii, A.4
Macii, E.5
Poncino, M.6
-
7
-
-
12844249966
-
Heat-and-Run: Leveraging SMT and CMP to manage power density through the operating system
-
M. Gomaa, M. D. Powell, and T. N. Vijaykumar. Heat-and-Run: leveraging SMT and CMP to manage power density through the operating system. In ASPLOS, 2004.
-
(2004)
ASPLOS
-
-
Gomaa, M.1
Powell, M.D.2
Vijaykumar, T.N.3
-
10
-
-
3042658619
-
Energy-aware communication and task scheduling for network-on-chip architectures under real-time constraints
-
J. Hu and R. Marculescu. Energy-aware communication and task scheduling for network-on-chip architectures under real-time constraints. In DATE, 2004.
-
(2004)
DATE
-
-
Hu, J.1
Marculescu, R.2
-
11
-
-
33646909655
-
Thermal-aware task allocation and scheduling for embedded systems
-
W.-L. Hung, Y. Xie, N. Vijaykrishnan, M. Kandemir, and M. J. Irwin. Thermal-aware task allocation and scheduling for embedded systems. In DATE, 2005.
-
(2005)
DATE
-
-
Hung, W.-L.1
Xie, Y.2
Vijaykrishnan, N.3
Kandemir, M.4
Irwin, M.J.5
-
13
-
-
25844503119
-
Introduction to the Cell multiprocessor
-
July/September
-
J. A. Kahle, M. N. Day, H. P. Hofstee, C. R. Johns, T. R. Maeurer, and D. Shippy. Introduction to the Cell multiprocessor. IBM Journal of Research & Development, 49(4/5):589-604, July/September 2005.
-
(2005)
IBM Journal of Research & Development
, vol.49
, Issue.4-5
, pp. 589-604
-
-
Kahle, J.A.1
Day, M.N.2
Hofstee, H.P.3
Johns, C.R.4
Maeurer, T.R.5
Shippy, D.6
-
14
-
-
20344374162
-
Niagara: A 32-way multithreaded SPARC processor
-
P. Kongetira, K. Aingaran, and K. Olukotun. Niagara: A 32-way multithreaded SPARC processor. IEEE Micro, 25(2):21-29, 2005.
-
(2005)
IEEE Micro
, vol.25
, Issue.2
, pp. 21-29
-
-
Kongetira, P.1
Aingaran, K.2
Olukotun, K.3
-
15
-
-
24944493371
-
A computational model of NBTI and hot carrier injection time-exponents for MOSFET reliability
-
Oct
-
H. Kufluoglu and M. A. Alam. A computational model of NBTI and hot carrier injection time-exponents for MOSFET reliability. Journal of Computational Electronics, 3 (3):165-169, Oct. 2004.
-
(2004)
Journal of Computational Electronics
, vol.3
, Issue.3
, pp. 165-169
-
-
Kufluoglu, H.1
Alam, M.A.2
-
16
-
-
0242335116
-
Thermally driven reliability issues in microelectronic systems: Statusquo and challenges
-
C. J. Lasance. Thermally driven reliability issues in microelectronic systems: statusquo and challenges. Microelectronics Reliability, 43:1969-1974, 2003.
-
(2003)
Microelectronics Reliability
, vol.43
, pp. 1969-1974
-
-
Lasance, C.J.1
-
17
-
-
33846230308
-
A power-efficient high-throughput 32-thread SPARC processor
-
A. Leon, L. Jinuk, K. Tam, W. Bryg, F. Schumacher, P. Kongetira, D. Weisner, and A. Strong. A power-efficient high-throughput 32-thread SPARC processor. ISSCC, 2006.
-
(2006)
ISSCC
-
-
Leon, A.1
Jinuk, L.2
Tam, K.3
Bryg, W.4
Schumacher, F.5
Kongetira, P.6
Weisner, D.7
Strong, A.8
-
18
-
-
0034854193
-
-
J. Liu, P. H. Chou, N. Bagherzadeh, and F. Kurdahi. Power-aware scheduling under timing constraints for mission-critical embedded systems. In DAC, 2001.
-
J. Liu, P. H. Chou, N. Bagherzadeh, and F. Kurdahi. Power-aware scheduling under timing constraints for mission-critical embedded systems. In DAC, 2001.
-
-
-
-
19
-
-
34250803250
-
Analysis of temporal and spatial temperature gradients for IC reliability
-
CS-2004-08, March
-
Z. Lu, W. Huang, S. Ghosh, J. Lach, M. Stan, and K. Skadron. Analysis of temporal and spatial temperature gradients for IC reliability. University of Virginia Technical Report CS-2004-08, March 2004.
-
(2004)
University of Virginia Technical Report
-
-
Lu, Z.1
Huang, W.2
Ghosh, S.3
Lach, J.4
Stan, M.5
Skadron, K.6
-
20
-
-
33748629904
-
Power-aware scheduling and dynamic voltage setting for tasks running on a hard real-time system
-
P. Rong and M. Pedram. Power-aware scheduling and dynamic voltage setting for tasks running on a hard real-time system. In ASPDAC, 2006.
-
(2006)
ASPDAC
-
-
Rong, P.1
Pedram, M.2
-
21
-
-
34047117937
-
Communicationaware allocation and scheduling framework for stream-oriented multi-processor system-on-chip
-
M. Ruggiero, A. Guerri, D. Bertozzi, F. Poletti, and M. Milano. Communicationaware allocation and scheduling framework for stream-oriented multi-processor system-on-chip. In DATE, 2006.
-
(2006)
DATE
-
-
Ruggiero, M.1
Guerri, A.2
Bertozzi, D.3
Poletti, F.4
Milano, M.5
-
22
-
-
27444438269
-
A case for thermal-aware floorplanning at the microarchitectural level
-
K. Sankaranarayanan, S. Velusamy, M. Stan, and K. Skadron. A case for thermal-aware floorplanning at the microarchitectural level. The Journal of Instruction-Level Parallelism, 7, 2005.
-
(2005)
The Journal of Instruction-Level Parallelism
, vol.7
-
-
Sankaranarayanan, K.1
Velusamy, S.2
Stan, M.3
Skadron, K.4
-
23
-
-
26844546666
-
Thermal integrity: A must for low-power IC digital design
-
Sept
-
M. Santarini. Thermal integrity: A must for low-power IC digital design. EDN, pages 37-42, Sept. 2005.
-
(2005)
EDN
, pp. 37-42
-
-
Santarini, M.1
-
24
-
-
34548361068
-
Optimization of reliability and power consumption in systems on a chip
-
T. Simunic, K. Mihic, and G. D. Micheli. Optimization of reliability and power consumption in systems on a chip. In PATMOS, 2005.
-
(2005)
PATMOS
-
-
Simunic, T.1
Mihic, K.2
Micheli, G.D.3
-
25
-
-
3042565511
-
Hybrid architectural dynamic thermal management
-
K. Skadron. Hybrid architectural dynamic thermal management. In DATE, 2004.
-
(2004)
DATE
-
-
Skadron, K.1
-
26
-
-
0038684860
-
Temperature-aware microarchitecture
-
K. Skadron, M. Stan, W. Huang, S. Velusamy, K. Sankaranarayanan, and D. Tarjan. Temperature-aware microarchitecture. In ISCA, 2003.
-
(2003)
ISCA
-
-
Skadron, K.1
Stan, M.2
Huang, W.3
Velusamy, S.4
Sankaranarayanan, K.5
Tarjan, D.6
-
27
-
-
1142305196
-
-
J. Srinivasan and S. V. Adve. Predictive dynamic thermal management for multimedia applications. In ICS, 2003.
-
J. Srinivasan and S. V. Adve. Predictive dynamic thermal management for multimedia applications. In ICS, 2003.
-
-
-
-
28
-
-
4644313547
-
-
J. Srinivasan, S. V. Adve, P. Bose, and J. A. Rivers. The case for lifetime reliability-aware microprocessors. In/SCA, 2004.
-
J. Srinivasan, S. V. Adve, P. Bose, and J. A. Rivers. The case for lifetime reliability-aware microprocessors. In/SCA, 2004.
-
-
-
-
29
-
-
0003352129
-
Thermal performance challenges from silicon to systems
-
R. Viswanath, V. Wakharkar, A. Watwe, and V. Lebonheur. Thermal performance challenges from silicon to systems. Intel Technology Journal, (Q3), 2000.
-
(2000)
Intel Technology Journal
, vol.Q3
-
-
Viswanath, R.1
Wakharkar, V.2
Watwe, A.3
Lebonheur, V.4
-
30
-
-
0035444245
-
Energy-aware runtime scheduling for embedded-multiprocessor SoCs
-
P. Yang, C. Wong, P. Marchal, F. Catthoor, D. Desmet, D. Verkest, and R. Lauwereins. Energy-aware runtime scheduling for embedded-multiprocessor SoCs. IEEE Des. Test, 18(5):46-58, 2001.
-
(2001)
IEEE Des. Test
, vol.18
, Issue.5
, pp. 46-58
-
-
Yang, P.1
Wong, C.2
Marchal, P.3
Catthoor, F.4
Desmet, D.5
Verkest, D.6
Lauwereins, R.7
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